5403c59c60
The LIT test cases were migrated with the script provided by Nikita Popov. Due to the size of the change it is split into several parts. Reviewed By: nemanja, nikic Differential Revision: https://reviews.llvm.org/D135474
122 lines
4.1 KiB
LLVM
122 lines
4.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O1 \
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; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
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; RUN: FileCheck %s -check-prefixes=CHECK-LE
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O1 \
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; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
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; RUN: FileCheck %s -check-prefixes=CHECK-BE
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@GlobLd1 = dso_local local_unnamed_addr global [20 x i1] zeroinitializer, align 1
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@GlobSt1 = dso_local local_unnamed_addr global [20 x i1] zeroinitializer, align 1
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define i1 @i64_ExtLoad_i1() {
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; CHECK-LE-LABEL: i64_ExtLoad_i1:
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; CHECK-LE: # %bb.0: # %entry
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; CHECK-LE-NEXT: plbz r3, GlobLd1@PCREL(0), 1
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; CHECK-LE-NEXT: blr
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;
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; CHECK-BE-LABEL: i64_ExtLoad_i1:
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; CHECK-BE: # %bb.0: # %entry
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; CHECK-BE-NEXT: addis r3, r2, GlobLd1@toc@ha
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; CHECK-BE-NEXT: lbz r3, GlobLd1@toc@l(r3)
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; CHECK-BE-NEXT: blr
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entry:
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%0 = load i1, ptr @GlobLd1, align 1
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ret i1 %0
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}
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define zeroext i1 @i64_ZextLoad_i1() {
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; CHECK-LE-LABEL: i64_ZextLoad_i1:
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; CHECK-LE: # %bb.0: # %entry
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; CHECK-LE-NEXT: plbz r3, GlobLd1@PCREL(0), 1
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; CHECK-LE-NEXT: blr
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;
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; CHECK-BE-LABEL: i64_ZextLoad_i1:
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; CHECK-BE: # %bb.0: # %entry
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; CHECK-BE-NEXT: addis r3, r2, GlobLd1@toc@ha
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; CHECK-BE-NEXT: lbz r3, GlobLd1@toc@l(r3)
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; CHECK-BE-NEXT: blr
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entry:
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%0 = load i1, ptr @GlobLd1, align 1
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ret i1 %0
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}
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define void @i32_ZextLoad_i1() {
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; CHECK-LE-LABEL: i32_ZextLoad_i1:
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; CHECK-LE: # %bb.0: # %entry
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; CHECK-LE-NEXT: plbz r3, GlobLd1@PCREL(0), 1
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; CHECK-LE-NEXT: clrldi r3, r3, 63
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; CHECK-LE-NEXT: pstb r3, GlobSt1@PCREL(0), 1
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; CHECK-LE-NEXT: blr
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;
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; CHECK-BE-LABEL: i32_ZextLoad_i1:
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; CHECK-BE: # %bb.0: # %entry
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; CHECK-BE-NEXT: addis r3, r2, GlobLd1@toc@ha
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; CHECK-BE-NEXT: addis r4, r2, GlobSt1@toc@ha
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; CHECK-BE-NEXT: lbz r3, GlobLd1@toc@l(r3)
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; CHECK-BE-NEXT: clrldi r3, r3, 63
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; CHECK-BE-NEXT: stb r3, GlobSt1@toc@l(r4)
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; CHECK-BE-NEXT: blr
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entry:
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%0 = load i1, ptr @GlobLd1, align 1
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store i1 %0, ptr @GlobSt1, align 1
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ret void
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}
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%1 = type { i64 }
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@Glob1 = external dso_local global %1, align 8
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@Glob2 = external dso_local unnamed_addr constant [11 x i8], align 1
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declare i32 @Decl(ptr, ptr) local_unnamed_addr #0
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define dso_local i1 @i32_ExtLoad_i1() local_unnamed_addr #0 {
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; CHECK-LE-LABEL: i32_ExtLoad_i1:
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; CHECK-LE: # %bb.0: # %bb
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; CHECK-LE-NEXT: mflr r0
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; CHECK-LE-NEXT: std r0, 16(r1)
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; CHECK-LE-NEXT: stdu r1, -32(r1)
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; CHECK-LE-NEXT: .cfi_def_cfa_offset 32
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; CHECK-LE-NEXT: .cfi_offset lr, 16
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; CHECK-LE-NEXT: paddi r3, 0, Glob1@PCREL, 1
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; CHECK-LE-NEXT: paddi r4, 0, Glob2@PCREL, 1
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; CHECK-LE-NEXT: bl Decl@notoc
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; CHECK-LE-NEXT: cmpwi cr1, r3, 0
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; CHECK-LE-NEXT: plbz r3, GlobLd1@PCREL(0), 1
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; CHECK-LE-NEXT: andi. r3, r3, 1
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; CHECK-LE-NEXT: crandc 4*cr5+lt, gt, 4*cr1+eq
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; CHECK-LE-NEXT: setbc r3, 4*cr5+lt
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; CHECK-LE-NEXT: addi r1, r1, 32
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; CHECK-LE-NEXT: ld r0, 16(r1)
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; CHECK-LE-NEXT: mtlr r0
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; CHECK-LE-NEXT: blr
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;
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; CHECK-BE-LABEL: i32_ExtLoad_i1:
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; CHECK-BE: # %bb.0: # %bb
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; CHECK-BE-NEXT: mflr r0
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; CHECK-BE-NEXT: std r0, 16(r1)
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; CHECK-BE-NEXT: stdu r1, -112(r1)
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; CHECK-BE-NEXT: .cfi_def_cfa_offset 112
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; CHECK-BE-NEXT: .cfi_offset lr, 16
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; CHECK-BE-NEXT: addis r3, r2, Glob1@toc@ha
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; CHECK-BE-NEXT: addis r4, r2, Glob2@toc@ha
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; CHECK-BE-NEXT: addi r3, r3, Glob1@toc@l
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; CHECK-BE-NEXT: addi r4, r4, Glob2@toc@l
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; CHECK-BE-NEXT: bl Decl
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; CHECK-BE-NEXT: nop
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; CHECK-BE-NEXT: cmpwi cr1, r3, 0
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; CHECK-BE-NEXT: addis r3, r2, GlobLd1@toc@ha
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; CHECK-BE-NEXT: lbz r3, GlobLd1@toc@l(r3)
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; CHECK-BE-NEXT: andi. r3, r3, 1
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; CHECK-BE-NEXT: crandc 4*cr5+lt, gt, 4*cr1+eq
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; CHECK-BE-NEXT: setbc r3, 4*cr5+lt
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; CHECK-BE-NEXT: addi r1, r1, 112
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; CHECK-BE-NEXT: ld r0, 16(r1)
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; CHECK-BE-NEXT: mtlr r0
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; CHECK-BE-NEXT: blr
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bb:
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%i = call signext i32 @Decl(ptr nonnull dereferenceable(32) @Glob1, ptr @Glob2) #1
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%i1 = icmp eq i32 %i, 0
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%i2 = load i1, ptr @GlobLd1, align 1
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%i3 = select i1 %i1, i1 false, i1 %i2
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ret i1 %i3
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}
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