67d3ef74b3
This PR continues https://github.com/llvm/llvm-project/pull/101732 changes in virtual register processing aimed to improve correctness of emitted MIR between passes from the perspective of MachineVerifier. Namely, the following changes are introduced: * register classes (lib/Target/SPIRV/SPIRVRegisterInfo.td) and instruction patterns (lib/Target/SPIRV/SPIRVInstrInfo.td) are corrected and simplified (by removing unnecessary sophisticated options) -- e.g., this PR gets rid of duplicating 32/64 bits patterns, removes ANYID register class and simplifies definition of the rest of register classes, * hardcoded LLT scalar types in passes before instruction selection are corrected -- the goal is to have correct bit width before instruction selection, and use 64 bits registers for pattern matching in the instruction selection pass; 32-bit registers remain where they are described in such terms by SPIR-V specification (like, for example, creation of virtual registers for scope/mem semantics operands), * rework virtual register type/class assignment for calls/builtins lowering, * a series of minor changes to fix validity of emitted code between passes: - ensure that that bitcast changes the type, - fix the pattern for instruction selection for OpExtInst, - simplify inline asm operands usage, - account for arbitrary integer sizes / update legalizer rules; * add '-verify-machineinstrs' to existed test cases. See also https://github.com/llvm/llvm-project/issues/88129 that this PR may resolve. This PR fixes a great number of issues reported by MachineVerifier and, as a result, reduces a number of failed test cases for the mode with expensive checks set on from ~200 to ~57.
75 lines
4.4 KiB
LLVM
75 lines
4.4 KiB
LLVM
; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s
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; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
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; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s
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; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv32-unknown-unknown %s -o - -filetype=obj | spirv-val %}
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; CHECK-DAG: OpName %[[#Foo:]] "foo"
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; CHECK-DAG: OpName %[[#CSQRT:]] "csqrt"
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; CHECK-DAG: %[[#FloatTy:]] = OpTypeFloat 64
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; CHECK-DAG: %[[#StructTy:]] = OpTypeStruct %[[#FloatTy]] %[[#FloatTy]]
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; CHECK-DAG: %[[#GPtrStructTy:]] = OpTypePointer Generic %[[#StructTy]]
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; CHECK-DAG: %[[#FPtrStructTy:]] = OpTypePointer Function %[[#StructTy]]
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; CHECK-DAG: %[[#WrapTy:]] = OpTypeStruct %[[#StructTy]]
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; CHECK-DAG: %[[#Int64Ty:]] = OpTypeInt 64 0
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; CHECK-DAG: %[[#Int32Ty:]] = OpTypeInt 32 0
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; CHECK-DAG: %[[#C1:]] = OpConstant %[[#Int32Ty]] 1
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; CHECK-DAG: %[[#ArrayTy:]] = OpTypeArray %[[#Int64Ty]] %[[#C1]]
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; CHECK-DAG: %[[#SArrayTy:]] = OpTypeStruct %[[#ArrayTy]]
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; CHECK-DAG: %[[#SSArrayTy:]] = OpTypeStruct %[[#SArrayTy]]
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; CHECK-DAG: %[[#CWPtrComplexTy:]] = OpTypePointer CrossWorkgroup %[[#WrapTy]]
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; CHECK-DAG: %[[#IdTy:]] = OpTypePointer Function %[[#SSArrayTy]]
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; CHECK: %[[#Foo]] = OpFunction
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; CHECK: OpFunctionParameter %[[#CWPtrComplexTy]]
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; CHECK: OpFunctionParameter %[[#IdTy]]
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; CHECK: %[[#CSQRT]] = OpFunction
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; CHECK: OpFunctionParameter %[[#GPtrStructTy]]
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; CHECK: OpFunctionParameter %[[#FPtrStructTy]]
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%"class.id" = type { %"class.array" }
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%"class.array" = type { [1 x i64] }
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%"class.complex" = type { { double, double } }
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define weak_odr dso_local spir_kernel void @foo(ptr addrspace(1) align 8 %_arg_buf_out1_access, ptr byval(%"class.id") align 8 %_arg_buf_out1_access3) {
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entry:
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%tmp.i.i = alloca { double, double }, align 8
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%byval-temp.i.i = alloca { double, double }, align 8
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%idxvalue = load i64, ptr %_arg_buf_out1_access3, align 8
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%add.ptr.i = getelementptr inbounds %"class.complex", ptr addrspace(1) %_arg_buf_out1_access, i64 %idxvalue
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%tmp.ascast.i.i = addrspacecast ptr %tmp.i.i to ptr addrspace(4)
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%byval-temp.imagp.i.i = getelementptr inbounds i8, ptr %byval-temp.i.i, i64 8
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store double -1.000000e+00, ptr %byval-temp.i.i, align 8
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store double 0.000000e+00, ptr %byval-temp.imagp.i.i, align 8
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call spir_func void @csqrt(ptr addrspace(4) dead_on_unwind writable sret({ double, double }) align 8 %tmp.ascast.i.i, ptr nonnull byval({ double, double }) align 8 %byval-temp.i.i)
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%tmp.ascast.real.i.i = load double, ptr %tmp.i.i, align 8
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%tmp.ascast.imagp.i.i = getelementptr inbounds i8, ptr %tmp.i.i, i64 8
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%tmp.ascast.imag.i.i = load double, ptr %tmp.ascast.imagp.i.i, align 8
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store double %tmp.ascast.real.i.i, ptr addrspace(1) %add.ptr.i, align 8
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%dest = getelementptr inbounds i8, ptr addrspace(1) %add.ptr.i, i64 8
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store double %tmp.ascast.imag.i.i, ptr addrspace(1) %dest, align 8
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ret void
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}
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define weak dso_local spir_func void @csqrt(ptr addrspace(4) dead_on_unwind noalias writable sret({ double, double }) align 8 %agg.result, ptr byval({ double, double }) align 8 %z) {
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entry:
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%tmp = alloca { double, double }, align 8
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%byval-temp = alloca { double, double }, align 8
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%tmp.ascast = addrspacecast ptr %tmp to ptr addrspace(4)
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%z.ascast.real = load double, ptr %z, align 8
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%z.ascast.imagp = getelementptr inbounds i8, ptr %z, i64 8
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%z.ascast.imag = load double, ptr %z.ascast.imagp, align 8
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%byval-temp.imagp = getelementptr inbounds i8, ptr %byval-temp, i64 8
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store double %z.ascast.real, ptr %byval-temp, align 8
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store double %z.ascast.imag, ptr %byval-temp.imagp, align 8
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call spir_func void @__devicelib_csqrt(ptr addrspace(4) dead_on_unwind writable sret({ double, double }) align 8 %tmp.ascast, ptr nonnull byval({ double, double }) align 8 %byval-temp) #7
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%tmp.ascast.real = load double, ptr %tmp, align 8
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%tmp.ascast.imagp = getelementptr inbounds i8, ptr %tmp, i64 8
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%tmp.ascast.imag = load double, ptr %tmp.ascast.imagp, align 8
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%agg.result.imagp = getelementptr inbounds i8, ptr addrspace(4) %agg.result, i64 8
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store double %tmp.ascast.real, ptr addrspace(4) %agg.result, align 8
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store double %tmp.ascast.imag, ptr addrspace(4) %agg.result.imagp, align 8
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ret void
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}
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declare extern_weak dso_local spir_func void @__devicelib_csqrt(ptr addrspace(4) dead_on_unwind writable sret({ double, double }) align 8, ptr byval({ double, double }) align 8) local_unnamed_addr #3
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