llvm-project/llvm/test/CodeGen/SPIRV/pointers/resource-vector-load-store.ll
Nathan Gauër f45e6a2834
[SPIR-V] Fix emit intrinsic for resource type (#150224)
This is a quick fix to make progress to the backend until we get a
proper type scavenging system.
The previous code was only checking the type if the resource was used
once. Slightly changed the code to look to all usages, and get the first
type.

This will certainly break in other cases, but it allows us to move
forward for now until we rewrite the type scavenging to handle untyped
GEP/ptradd correctly.

Related to #145002
2025-07-24 16:45:33 +02:00

40 lines
2.3 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -verify-machineinstrs -O3 -mtriple=spirv1.6-unknown-vulkan1.3-compute %s -o - | FileCheck %s --match-full-lines
; RUN: %if spirv-tools %{ llc -O3 -mtriple=spirv1.6-unknown-vulkan1.3-compute %s -o - -filetype=obj | spirv-val %}
@.str = private unnamed_addr constant [7 x i8] c"buffer\00", align 1
define void @main() "hlsl.shader"="pixel" {
; CHECK: %25 = OpFunction %2 None %3 ; -- Begin function main
; CHECK-NEXT: %1 = OpLabel
; CHECK-NEXT: %26 = OpVariable %14 Function %23
; CHECK-NEXT: %27 = OpLoad %7 %24
; CHECK-NEXT: %28 = OpImageRead %5 %27 %16
; CHECK-NEXT: %29 = OpCompositeExtract %4 %28 0
; CHECK-NEXT: %30 = OpCompositeExtract %4 %28 1
; CHECK-NEXT: %31 = OpFAdd %4 %30 %29
; CHECK-NEXT: %32 = OpCompositeInsert %5 %31 %28 0
; CHECK-NEXT: %33 = OpLoad %7 %24
; CHECK-NEXT: OpImageWrite %33 %16 %32
; CHECK-NEXT: OpReturn
; CHECK-NEXT: OpFunctionEnd
entry:
%0 = tail call target("spirv.Image", float, 5, 2, 0, 0, 2, 0) @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr nonnull @.str)
%1 = tail call noundef align 16 dereferenceable(16) ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.Image_f32_5_2_0_0_2_0t(target("spirv.Image", float, 5, 2, 0, 0, 2, 0) %0, i32 0)
%2 = load <4 x float>, ptr addrspace(11) %1, align 16
%3 = extractelement <4 x float> %2, i64 0
%4 = extractelement <4 x float> %2, i64 1
%add.i = fadd reassoc nnan ninf nsz arcp afn float %4, %3
%5 = insertelement <4 x float> %2, float %add.i, i64 0
store <4 x float> %5, ptr addrspace(11) %1, align 16
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)
declare target("spirv.Image", float, 5, 2, 0, 0, 2, 0) @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_0t(i32, i32, i32, i32, i1, ptr) #0
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)
declare ptr addrspace(11) @llvm.spv.resource.getpointer.p11.tspirv.Image_f32_5_2_0_0_2_0t(target("spirv.Image", float, 5, 2, 0, 0, 2, 0), i32) #0
attributes #0 = { mustprogress nocallback nofree nosync nounwind willreturn memory(none) }