6d03f51f0c
- _Float16 is now accepted by Clang. - The half IR type is fully handled by the backend. - These values are passed in FP registers and converted to/from float around each operation. - Compiler-rt conversion functions are now built for s390x including the missing extendhfdf2 which was added. Fixes #50374
268 lines
11 KiB
LLVM
268 lines
11 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -mtriple=s390x-linux < %s | FileCheck %s -check-prefix=SOFT-FLOAT
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define half @fmuladd_intrinsic_f16(half %a, half %b, half %c) #0 {
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; SOFT-FLOAT-LABEL: fmuladd_intrinsic_f16:
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; SOFT-FLOAT: # %bb.0:
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; SOFT-FLOAT-NEXT: stmg %r12, %r15, 96(%r15)
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; SOFT-FLOAT-NEXT: .cfi_offset %r12, -64
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; SOFT-FLOAT-NEXT: .cfi_offset %r13, -56
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; SOFT-FLOAT-NEXT: .cfi_offset %r14, -48
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; SOFT-FLOAT-NEXT: .cfi_offset %r15, -40
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; SOFT-FLOAT-NEXT: aghi %r15, -160
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; SOFT-FLOAT-NEXT: .cfi_def_cfa_offset 320
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; SOFT-FLOAT-NEXT: # kill: def $r4l killed $r4l def $r4d
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; SOFT-FLOAT-NEXT: llghr %r0, %r4
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; SOFT-FLOAT-NEXT: lr %r13, %r3
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; SOFT-FLOAT-NEXT: lr %r12, %r2
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; SOFT-FLOAT-NEXT: lgr %r2, %r0
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; SOFT-FLOAT-NEXT: brasl %r14, __extendhfsf2@PLT
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; SOFT-FLOAT-NEXT: llghr %r0, %r12
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; SOFT-FLOAT-NEXT: lgr %r12, %r2
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; SOFT-FLOAT-NEXT: lgr %r2, %r0
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; SOFT-FLOAT-NEXT: brasl %r14, __extendhfsf2@PLT
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; SOFT-FLOAT-NEXT: llghr %r0, %r13
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; SOFT-FLOAT-NEXT: lgr %r13, %r2
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; SOFT-FLOAT-NEXT: lgr %r2, %r0
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; SOFT-FLOAT-NEXT: brasl %r14, __extendhfsf2@PLT
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; SOFT-FLOAT-NEXT: lgr %r3, %r2
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; SOFT-FLOAT-NEXT: lgr %r2, %r13
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; SOFT-FLOAT-NEXT: brasl %r14, __mulsf3@PLT
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; SOFT-FLOAT-NEXT: lgr %r3, %r12
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; SOFT-FLOAT-NEXT: brasl %r14, __addsf3@PLT
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; SOFT-FLOAT-NEXT: brasl %r14, __truncsfhf2@PLT
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; SOFT-FLOAT-NEXT: # kill: def $r2l killed $r2l killed $r2d
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; SOFT-FLOAT-NEXT: lmg %r12, %r15, 256(%r15)
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; SOFT-FLOAT-NEXT: br %r14
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%result = call half @llvm.fmuladd.f16(half %a, half %b, half %c)
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ret half %result
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}
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define float @fmuladd_intrinsic_f32(float %a, float %b, float %c) #0 {
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; SOFT-FLOAT-LABEL: fmuladd_intrinsic_f32:
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; SOFT-FLOAT: # %bb.0:
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; SOFT-FLOAT-NEXT: stmg %r13, %r15, 104(%r15)
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; SOFT-FLOAT-NEXT: .cfi_offset %r13, -56
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; SOFT-FLOAT-NEXT: .cfi_offset %r14, -48
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; SOFT-FLOAT-NEXT: .cfi_offset %r15, -40
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; SOFT-FLOAT-NEXT: aghi %r15, -160
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; SOFT-FLOAT-NEXT: .cfi_def_cfa_offset 320
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; SOFT-FLOAT-NEXT: llgfr %r2, %r2
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; SOFT-FLOAT-NEXT: llgfr %r3, %r3
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; SOFT-FLOAT-NEXT: lr %r13, %r4
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; SOFT-FLOAT-NEXT: brasl %r14, __mulsf3@PLT
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; SOFT-FLOAT-NEXT: llgfr %r3, %r13
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; SOFT-FLOAT-NEXT: brasl %r14, __addsf3@PLT
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; SOFT-FLOAT-NEXT: # kill: def $r2l killed $r2l killed $r2d
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; SOFT-FLOAT-NEXT: lmg %r13, %r15, 264(%r15)
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; SOFT-FLOAT-NEXT: br %r14
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%result = call float @llvm.fmuladd.f32(float %a, float %b, float %c)
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ret float %result
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}
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define double @fmuladd_intrinsic_f64(double %a, double %b, double %c) #0 {
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; SOFT-FLOAT-LABEL: fmuladd_intrinsic_f64:
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; SOFT-FLOAT: # %bb.0:
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; SOFT-FLOAT-NEXT: stmg %r13, %r15, 104(%r15)
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; SOFT-FLOAT-NEXT: .cfi_offset %r13, -56
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; SOFT-FLOAT-NEXT: .cfi_offset %r14, -48
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; SOFT-FLOAT-NEXT: .cfi_offset %r15, -40
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; SOFT-FLOAT-NEXT: aghi %r15, -160
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; SOFT-FLOAT-NEXT: .cfi_def_cfa_offset 320
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; SOFT-FLOAT-NEXT: lgr %r13, %r4
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; SOFT-FLOAT-NEXT: brasl %r14, __muldf3@PLT
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; SOFT-FLOAT-NEXT: lgr %r3, %r13
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; SOFT-FLOAT-NEXT: brasl %r14, __adddf3@PLT
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; SOFT-FLOAT-NEXT: lmg %r13, %r15, 264(%r15)
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; SOFT-FLOAT-NEXT: br %r14
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%result = call double @llvm.fmuladd.f64(double %a, double %b, double %c)
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ret double %result
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}
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define float @fmuladd_contract_f32(float %a, float %b, float %c) #0 {
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; SOFT-FLOAT-LABEL: fmuladd_contract_f32:
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; SOFT-FLOAT: # %bb.0:
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; SOFT-FLOAT-NEXT: stmg %r13, %r15, 104(%r15)
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; SOFT-FLOAT-NEXT: .cfi_offset %r13, -56
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; SOFT-FLOAT-NEXT: .cfi_offset %r14, -48
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; SOFT-FLOAT-NEXT: .cfi_offset %r15, -40
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; SOFT-FLOAT-NEXT: aghi %r15, -160
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; SOFT-FLOAT-NEXT: .cfi_def_cfa_offset 320
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; SOFT-FLOAT-NEXT: llgfr %r2, %r2
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; SOFT-FLOAT-NEXT: llgfr %r3, %r3
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; SOFT-FLOAT-NEXT: lr %r13, %r4
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; SOFT-FLOAT-NEXT: brasl %r14, __mulsf3@PLT
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; SOFT-FLOAT-NEXT: llgfr %r3, %r13
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; SOFT-FLOAT-NEXT: brasl %r14, __addsf3@PLT
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; SOFT-FLOAT-NEXT: # kill: def $r2l killed $r2l killed $r2d
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; SOFT-FLOAT-NEXT: lmg %r13, %r15, 264(%r15)
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; SOFT-FLOAT-NEXT: br %r14
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%product = fmul contract float %a, %b
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%result = fadd contract float %product, %c
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ret float %result
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}
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define double @fmuladd_contract_f64(double %a, double %b, double %c) #0 {
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; SOFT-FLOAT-LABEL: fmuladd_contract_f64:
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; SOFT-FLOAT: # %bb.0:
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; SOFT-FLOAT-NEXT: stmg %r13, %r15, 104(%r15)
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; SOFT-FLOAT-NEXT: .cfi_offset %r13, -56
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; SOFT-FLOAT-NEXT: .cfi_offset %r14, -48
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; SOFT-FLOAT-NEXT: .cfi_offset %r15, -40
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; SOFT-FLOAT-NEXT: aghi %r15, -160
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; SOFT-FLOAT-NEXT: .cfi_def_cfa_offset 320
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; SOFT-FLOAT-NEXT: lgr %r13, %r4
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; SOFT-FLOAT-NEXT: brasl %r14, __muldf3@PLT
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; SOFT-FLOAT-NEXT: lgr %r3, %r13
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; SOFT-FLOAT-NEXT: brasl %r14, __adddf3@PLT
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; SOFT-FLOAT-NEXT: lmg %r13, %r15, 264(%r15)
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; SOFT-FLOAT-NEXT: br %r14
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%product = fmul contract double %a, %b
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%result = fadd contract double %product, %c
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ret double %result
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}
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define <4 x float> @fmuladd_contract_v4f32(<4 x float> %a, <4 x float> %b, <4 x float> %c) #0 {
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; SOFT-FLOAT-LABEL: fmuladd_contract_v4f32:
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; SOFT-FLOAT: # %bb.0:
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; SOFT-FLOAT-NEXT: stmg %r7, %r15, 56(%r15)
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; SOFT-FLOAT-NEXT: .cfi_offset %r7, -104
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; SOFT-FLOAT-NEXT: .cfi_offset %r8, -96
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; SOFT-FLOAT-NEXT: .cfi_offset %r9, -88
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; SOFT-FLOAT-NEXT: .cfi_offset %r10, -80
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; SOFT-FLOAT-NEXT: .cfi_offset %r11, -72
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; SOFT-FLOAT-NEXT: .cfi_offset %r12, -64
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; SOFT-FLOAT-NEXT: .cfi_offset %r13, -56
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; SOFT-FLOAT-NEXT: .cfi_offset %r14, -48
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; SOFT-FLOAT-NEXT: .cfi_offset %r15, -40
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; SOFT-FLOAT-NEXT: aghi %r15, -176
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; SOFT-FLOAT-NEXT: .cfi_def_cfa_offset 336
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; SOFT-FLOAT-NEXT: llgf %r0, 388(%r15)
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; SOFT-FLOAT-NEXT: stg %r0, 168(%r15) # 8-byte Spill
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; SOFT-FLOAT-NEXT: llgf %r0, 380(%r15)
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; SOFT-FLOAT-NEXT: stg %r0, 160(%r15) # 8-byte Spill
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; SOFT-FLOAT-NEXT: llgf %r11, 372(%r15)
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; SOFT-FLOAT-NEXT: llgf %r10, 364(%r15)
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; SOFT-FLOAT-NEXT: llgf %r8, 340(%r15)
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; SOFT-FLOAT-NEXT: llgf %r0, 356(%r15)
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; SOFT-FLOAT-NEXT: llgf %r7, 348(%r15)
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; SOFT-FLOAT-NEXT: llgfr %r1, %r5
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; SOFT-FLOAT-NEXT: lr %r9, %r4
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; SOFT-FLOAT-NEXT: lr %r13, %r3
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; SOFT-FLOAT-NEXT: lr %r12, %r2
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; SOFT-FLOAT-NEXT: lgr %r2, %r1
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; SOFT-FLOAT-NEXT: lgr %r3, %r0
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; SOFT-FLOAT-NEXT: brasl %r14, __mulsf3@PLT
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; SOFT-FLOAT-NEXT: llgfr %r0, %r9
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; SOFT-FLOAT-NEXT: lgr %r9, %r2
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; SOFT-FLOAT-NEXT: lgr %r2, %r0
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; SOFT-FLOAT-NEXT: lgr %r3, %r7
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; SOFT-FLOAT-NEXT: brasl %r14, __mulsf3@PLT
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; SOFT-FLOAT-NEXT: llgfr %r0, %r13
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; SOFT-FLOAT-NEXT: lgr %r13, %r2
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; SOFT-FLOAT-NEXT: lgr %r2, %r0
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; SOFT-FLOAT-NEXT: lgr %r3, %r8
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; SOFT-FLOAT-NEXT: brasl %r14, __mulsf3@PLT
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; SOFT-FLOAT-NEXT: llgfr %r0, %r12
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; SOFT-FLOAT-NEXT: llgfr %r3, %r6
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; SOFT-FLOAT-NEXT: lgr %r12, %r2
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; SOFT-FLOAT-NEXT: lgr %r2, %r0
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; SOFT-FLOAT-NEXT: brasl %r14, __mulsf3@PLT
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; SOFT-FLOAT-NEXT: lgr %r3, %r10
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; SOFT-FLOAT-NEXT: brasl %r14, __addsf3@PLT
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; SOFT-FLOAT-NEXT: lgr %r10, %r2
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; SOFT-FLOAT-NEXT: lgr %r2, %r12
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; SOFT-FLOAT-NEXT: lgr %r3, %r11
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; SOFT-FLOAT-NEXT: brasl %r14, __addsf3@PLT
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; SOFT-FLOAT-NEXT: lgr %r12, %r2
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; SOFT-FLOAT-NEXT: lgr %r2, %r13
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; SOFT-FLOAT-NEXT: lg %r3, 160(%r15) # 8-byte Reload
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; SOFT-FLOAT-NEXT: brasl %r14, __addsf3@PLT
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; SOFT-FLOAT-NEXT: lgr %r13, %r2
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; SOFT-FLOAT-NEXT: lgr %r2, %r9
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; SOFT-FLOAT-NEXT: lg %r3, 168(%r15) # 8-byte Reload
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; SOFT-FLOAT-NEXT: brasl %r14, __addsf3@PLT
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; SOFT-FLOAT-NEXT: lgr %r5, %r2
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; SOFT-FLOAT-NEXT: lr %r2, %r10
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; SOFT-FLOAT-NEXT: lr %r3, %r12
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; SOFT-FLOAT-NEXT: lr %r4, %r13
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; SOFT-FLOAT-NEXT: # kill: def $r5l killed $r5l killed $r5d
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; SOFT-FLOAT-NEXT: lmg %r7, %r15, 232(%r15)
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; SOFT-FLOAT-NEXT: br %r14
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%product = fmul contract <4 x float> %a, %b
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%result = fadd contract <4 x float> %product, %c
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ret <4 x float> %result
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}
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define <4 x double> @fmuladd_contract_v4f64(<4 x double> %a, <4 x double> %b, <4 x double> %c) #0 {
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; SOFT-FLOAT-LABEL: fmuladd_contract_v4f64:
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; SOFT-FLOAT: # %bb.0:
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; SOFT-FLOAT-NEXT: stmg %r6, %r15, 48(%r15)
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; SOFT-FLOAT-NEXT: .cfi_offset %r6, -112
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; SOFT-FLOAT-NEXT: .cfi_offset %r7, -104
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; SOFT-FLOAT-NEXT: .cfi_offset %r8, -96
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; SOFT-FLOAT-NEXT: .cfi_offset %r9, -88
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; SOFT-FLOAT-NEXT: .cfi_offset %r10, -80
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; SOFT-FLOAT-NEXT: .cfi_offset %r11, -72
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; SOFT-FLOAT-NEXT: .cfi_offset %r12, -64
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; SOFT-FLOAT-NEXT: .cfi_offset %r13, -56
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; SOFT-FLOAT-NEXT: .cfi_offset %r14, -48
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; SOFT-FLOAT-NEXT: .cfi_offset %r15, -40
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; SOFT-FLOAT-NEXT: aghi %r15, -184
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; SOFT-FLOAT-NEXT: .cfi_def_cfa_offset 344
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; SOFT-FLOAT-NEXT: mvc 176(8,%r15), 24(%r4) # 8-byte Folded Spill
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; SOFT-FLOAT-NEXT: mvc 168(8,%r15), 16(%r4) # 8-byte Folded Spill
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; SOFT-FLOAT-NEXT: mvc 160(8,%r15), 8(%r4) # 8-byte Folded Spill
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; SOFT-FLOAT-NEXT: lg %r10, 0(%r4)
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; SOFT-FLOAT-NEXT: lg %r9, 0(%r2)
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; SOFT-FLOAT-NEXT: lg %r8, 0(%r3)
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; SOFT-FLOAT-NEXT: lg %r7, 8(%r2)
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; SOFT-FLOAT-NEXT: lg %r6, 8(%r3)
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; SOFT-FLOAT-NEXT: lg %r13, 16(%r2)
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; SOFT-FLOAT-NEXT: lg %r2, 24(%r2)
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; SOFT-FLOAT-NEXT: lg %r0, 24(%r3)
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; SOFT-FLOAT-NEXT: lg %r12, 16(%r3)
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; SOFT-FLOAT-NEXT: lgr %r3, %r0
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; SOFT-FLOAT-NEXT: brasl %r14, __muldf3@PLT
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; SOFT-FLOAT-NEXT: lgr %r11, %r2
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; SOFT-FLOAT-NEXT: lgr %r2, %r13
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; SOFT-FLOAT-NEXT: lgr %r3, %r12
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; SOFT-FLOAT-NEXT: brasl %r14, __muldf3@PLT
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; SOFT-FLOAT-NEXT: lgr %r13, %r2
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; SOFT-FLOAT-NEXT: lgr %r2, %r7
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; SOFT-FLOAT-NEXT: lgr %r3, %r6
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; SOFT-FLOAT-NEXT: brasl %r14, __muldf3@PLT
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; SOFT-FLOAT-NEXT: lgr %r12, %r2
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; SOFT-FLOAT-NEXT: lgr %r2, %r9
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; SOFT-FLOAT-NEXT: lgr %r3, %r8
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; SOFT-FLOAT-NEXT: brasl %r14, __muldf3@PLT
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; SOFT-FLOAT-NEXT: lgr %r3, %r10
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; SOFT-FLOAT-NEXT: brasl %r14, __adddf3@PLT
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; SOFT-FLOAT-NEXT: lgr %r10, %r2
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; SOFT-FLOAT-NEXT: lgr %r2, %r12
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; SOFT-FLOAT-NEXT: lg %r3, 160(%r15) # 8-byte Reload
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; SOFT-FLOAT-NEXT: brasl %r14, __adddf3@PLT
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; SOFT-FLOAT-NEXT: lgr %r12, %r2
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; SOFT-FLOAT-NEXT: lgr %r2, %r13
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; SOFT-FLOAT-NEXT: lg %r3, 168(%r15) # 8-byte Reload
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; SOFT-FLOAT-NEXT: brasl %r14, __adddf3@PLT
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; SOFT-FLOAT-NEXT: lgr %r13, %r2
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; SOFT-FLOAT-NEXT: lgr %r2, %r11
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; SOFT-FLOAT-NEXT: lg %r3, 176(%r15) # 8-byte Reload
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; SOFT-FLOAT-NEXT: brasl %r14, __adddf3@PLT
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; SOFT-FLOAT-NEXT: lgr %r5, %r2
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; SOFT-FLOAT-NEXT: lgr %r2, %r10
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; SOFT-FLOAT-NEXT: lgr %r3, %r12
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; SOFT-FLOAT-NEXT: lgr %r4, %r13
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; SOFT-FLOAT-NEXT: lmg %r6, %r15, 232(%r15)
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; SOFT-FLOAT-NEXT: br %r14
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%product = fmul contract <4 x double> %a, %b
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%result = fadd contract <4 x double> %product, %c
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ret <4 x double> %result
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}
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attributes #0 = { "use-soft-float"="true" }
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declare float @llvm.fmuladd.f32(float %a, float %b, float %c)
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declare double @llvm.fmuladd.f64(double %a, double %b, double %c)
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