b4b4950f7f
Support bitcasting between int/fp/vector values and 'r'/'f'/'v' inline assembly operands. This is intended to match GCCs beahvior. Reviewed By: Ulrich Weigand Differential Revision: https://reviews.llvm.org/D146059
10 lines
301 B
LLVM
10 lines
301 B
LLVM
; RUN: not llc -mtriple=s390x-linux-gnu -mcpu=z15 -mattr=soft-float < %s 2>&1 | FileCheck %s
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; CHECK: error: couldn't allocate output register for constraint 'f'
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define signext i32 @int_and_f(i32 signext %cc_dep1) {
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entry:
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%0 = tail call i32 asm sideeffect "", "=f,0"(i32 %cc_dep1)
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ret i32 %0
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}
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