a1710eb3cd
The LIT test cases were migrated with the script provided by Nikita Popov. No manual changes were made. Committed without review since no functional changes, after consultation with uweigand.
131 lines
3.6 KiB
LLVM
131 lines
3.6 KiB
LLVM
; Test 64-bit unsigned comparison in which the second operand is a variable.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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; Check CLGR.
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define double @f1(double %a, double %b, i64 %i1, i64 %i2) {
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; CHECK-LABEL: f1:
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; CHECK: clgrbl %r2, %r3, 0(%r14)
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%cond = icmp ult i64 %i1, %i2
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check CLG with no displacement.
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define double @f2(double %a, double %b, i64 %i1, ptr %ptr) {
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; CHECK-LABEL: f2:
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; CHECK: clg %r2, 0(%r3)
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; CHECK-NEXT: blr %r14
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%i2 = load i64, ptr %ptr
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%cond = icmp ult i64 %i1, %i2
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check the high end of the aligned CLG range.
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define double @f3(double %a, double %b, i64 %i1, ptr %base) {
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; CHECK-LABEL: f3:
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; CHECK: clg %r2, 524280(%r3)
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; CHECK-NEXT: blr %r14
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%ptr = getelementptr i64, ptr %base, i64 65535
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%i2 = load i64, ptr %ptr
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%cond = icmp ult i64 %i1, %i2
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check the next doubleword up, which needs separate address logic.
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; Other sequences besides this one would be OK.
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define double @f4(double %a, double %b, i64 %i1, ptr %base) {
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; CHECK-LABEL: f4:
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; CHECK: agfi %r3, 524288
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; CHECK: clg %r2, 0(%r3)
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; CHECK-NEXT: blr %r14
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%ptr = getelementptr i64, ptr %base, i64 65536
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%i2 = load i64, ptr %ptr
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%cond = icmp ult i64 %i1, %i2
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check the high end of the negative aligned CLG range.
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define double @f5(double %a, double %b, i64 %i1, ptr %base) {
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; CHECK-LABEL: f5:
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; CHECK: clg %r2, -8(%r3)
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; CHECK-NEXT: blr %r14
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%ptr = getelementptr i64, ptr %base, i64 -1
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%i2 = load i64, ptr %ptr
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%cond = icmp ult i64 %i1, %i2
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check the low end of the CLG range.
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define double @f6(double %a, double %b, i64 %i1, ptr %base) {
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; CHECK-LABEL: f6:
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; CHECK: clg %r2, -524288(%r3)
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; CHECK-NEXT: blr %r14
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%ptr = getelementptr i64, ptr %base, i64 -65536
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%i2 = load i64, ptr %ptr
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%cond = icmp ult i64 %i1, %i2
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check the next doubleword down, which needs separate address logic.
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; Other sequences besides this one would be OK.
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define double @f7(double %a, double %b, i64 %i1, ptr %base) {
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; CHECK-LABEL: f7:
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; CHECK: agfi %r3, -524296
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; CHECK: clg %r2, 0(%r3)
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; CHECK-NEXT: blr %r14
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%ptr = getelementptr i64, ptr %base, i64 -65537
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%i2 = load i64, ptr %ptr
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%cond = icmp ult i64 %i1, %i2
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check that CLG allows an index.
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define double @f8(double %a, double %b, i64 %i1, i64 %base, i64 %index) {
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; CHECK-LABEL: f8:
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; CHECK: clg %r2, 524280({{%r4,%r3|%r3,%r4}})
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; CHECK-NEXT: blr %r14
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%add1 = add i64 %base, %index
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%add2 = add i64 %add1, 524280
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%ptr = inttoptr i64 %add2 to ptr
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%i2 = load i64, ptr %ptr
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%cond = icmp ult i64 %i1, %i2
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check the comparison can be reversed if that allows CLG to be used.
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define double @f9(double %a, double %b, i64 %i2, ptr %ptr) {
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; CHECK-LABEL: f9:
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; CHECK: clg %r2, 0(%r3)
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; CHECK-NEXT: bhr %r14
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%i1 = load i64, ptr %ptr
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%cond = icmp ult i64 %i1, %i2
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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