a1710eb3cd
The LIT test cases were migrated with the script provided by Nikita Popov. No manual changes were made. Committed without review since no functional changes, after consultation with uweigand.
47 lines
1.4 KiB
LLVM
47 lines
1.4 KiB
LLVM
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 -prefetch-distance=50 \
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; RUN: -loop-prefetch-writes -stop-after=loop-data-prefetch | FileCheck %s
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;
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; Check that prefetches are emitted in a position that is executed each
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; iteration for each targeted memory instruction. The two stores in %true and
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; %false are within one cache line in memory, so they should get a single
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; prefetch in %for.body.
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;
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; CHECK-LABEL: for.body
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; CHECK: call void @llvm.prefetch.p0(ptr {{.*}}, i32 0
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; CHECK: call void @llvm.prefetch.p0(ptr {{.*}}, i32 1
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; CHECK-LABEL: true
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; CHECK-LABEL: false
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; CHECK-LABEL: latch
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define void @fun(ptr nocapture %Src, ptr nocapture readonly %Dst) {
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entry:
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br label %for.body
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for.body:
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%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next.9, %latch ]
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%arrayidx = getelementptr inbounds i32, ptr %Dst, i64 %indvars.iv
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%0 = load i32, ptr %arrayidx, align 4
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%cmp = icmp sgt i32 %0, 0
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br i1 %cmp, label %true, label %false
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true:
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%arrayidx2 = getelementptr inbounds i32, ptr %Src, i64 %indvars.iv
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store i32 %0, ptr %arrayidx2, align 4
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br label %latch
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false:
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%a = add i64 %indvars.iv, 8
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%arrayidx3 = getelementptr inbounds i32, ptr %Src, i64 %a
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store i32 %0, ptr %arrayidx3, align 4
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br label %latch
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latch:
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%indvars.iv.next.9 = add nuw nsw i64 %indvars.iv, 1600
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%cmp.9 = icmp ult i64 %indvars.iv.next.9, 11200
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br i1 %cmp.9, label %for.body, label %for.cond.cleanup
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for.cond.cleanup:
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ret void
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}
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