e094abde42
The previous expansion of [US]CMP was done using two selects and two compares. It produced decent code, but on many platforms it is better to implement [US]CMP nodes by performing the following operation: ``` [us]cmp(x, y) = (x [us]> y) - (x [us]< y) ``` This patch adds this new expansion, as well as a hook in TargetLowering to allow some targets to still use the select-based approach. AArch64 and SystemZ are currently the only targets to prefer the former approach, but other targets may also start to use it if it provides for better codegen.
110 lines
2.9 KiB
LLVM
110 lines
2.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
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define i8 @scmp.8.8(i8 signext %x, i8 signext %y) nounwind {
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; CHECK-LABEL: scmp.8.8:
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; CHECK: # %bb.0:
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; CHECK-NEXT: cr %r2, %r3
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; CHECK-NEXT: lhi %r2, 0
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; CHECK-NEXT: lochih %r2, 1
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; CHECK-NEXT: lochil %r2, -1
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; CHECK-NEXT: br %r14
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%1 = call i8 @llvm.scmp(i8 %x, i8 %y)
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ret i8 %1
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}
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define i8 @scmp.8.16(i16 signext %x, i16 signext %y) nounwind {
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; CHECK-LABEL: scmp.8.16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: cr %r2, %r3
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; CHECK-NEXT: lhi %r2, 0
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; CHECK-NEXT: lochih %r2, 1
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; CHECK-NEXT: lochil %r2, -1
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; CHECK-NEXT: br %r14
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%1 = call i8 @llvm.scmp(i16 %x, i16 %y)
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ret i8 %1
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}
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define i8 @scmp.8.32(i32 %x, i32 %y) nounwind {
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; CHECK-LABEL: scmp.8.32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: cr %r2, %r3
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; CHECK-NEXT: lhi %r2, 0
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; CHECK-NEXT: lochih %r2, 1
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; CHECK-NEXT: lochil %r2, -1
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; CHECK-NEXT: br %r14
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%1 = call i8 @llvm.scmp(i32 %x, i32 %y)
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ret i8 %1
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}
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define i8 @scmp.8.64(i64 %x, i64 %y) nounwind {
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; CHECK-LABEL: scmp.8.64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: cgr %r2, %r3
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; CHECK-NEXT: lhi %r2, 0
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; CHECK-NEXT: lochih %r2, 1
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; CHECK-NEXT: lochil %r2, -1
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; CHECK-NEXT: br %r14
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%1 = call i8 @llvm.scmp(i64 %x, i64 %y)
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ret i8 %1
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}
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define i8 @scmp.8.128(i128 %x, i128 %y) nounwind {
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; CHECK-LABEL: scmp.8.128:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vl %v0, 0(%r3), 3
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; CHECK-NEXT: vl %v1, 0(%r2), 3
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; CHECK-NEXT: vecg %v0, %v1
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; CHECK-NEXT: jlh .LBB4_2
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; CHECK-NEXT: # %bb.1:
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; CHECK-NEXT: vchlgs %v2, %v1, %v0
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; CHECK-NEXT: .LBB4_2:
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; CHECK-NEXT: lhi %r2, 0
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; CHECK-NEXT: lochil %r2, 1
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; CHECK-NEXT: vecg %v1, %v0
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; CHECK-NEXT: jlh .LBB4_4
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; CHECK-NEXT: # %bb.3:
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; CHECK-NEXT: vchlgs %v0, %v0, %v1
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; CHECK-NEXT: .LBB4_4:
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; CHECK-NEXT: lochil %r2, -1
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; CHECK-NEXT: br %r14
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%1 = call i8 @llvm.scmp(i128 %x, i128 %y)
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ret i8 %1
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}
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define i32 @scmp.32.32(i32 %x, i32 %y) nounwind {
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; CHECK-LABEL: scmp.32.32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: cr %r2, %r3
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; CHECK-NEXT: lhi %r2, 0
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; CHECK-NEXT: lochih %r2, 1
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; CHECK-NEXT: lochil %r2, -1
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; CHECK-NEXT: br %r14
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%1 = call i32 @llvm.scmp(i32 %x, i32 %y)
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ret i32 %1
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}
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define i32 @scmp.32.64(i64 %x, i64 %y) nounwind {
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; CHECK-LABEL: scmp.32.64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: cgr %r2, %r3
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; CHECK-NEXT: lhi %r2, 0
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; CHECK-NEXT: lochih %r2, 1
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; CHECK-NEXT: lochil %r2, -1
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; CHECK-NEXT: br %r14
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%1 = call i32 @llvm.scmp(i64 %x, i64 %y)
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ret i32 %1
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}
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define i64 @scmp.64.64(i64 %x, i64 %y) nounwind {
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; CHECK-LABEL: scmp.64.64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: cgr %r2, %r3
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; CHECK-NEXT: lghi %r2, 0
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; CHECK-NEXT: locghih %r2, 1
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; CHECK-NEXT: locghil %r2, -1
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; CHECK-NEXT: br %r14
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%1 = call i64 @llvm.scmp(i64 %x, i64 %y)
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ret i64 %1
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}
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