a1710eb3cd
The LIT test cases were migrated with the script provided by Nikita Popov. No manual changes were made. Committed without review since no functional changes, after consultation with uweigand.
214 lines
4.7 KiB
LLVM
214 lines
4.7 KiB
LLVM
; Test vector stores.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
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; Test v16i8 stores.
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define void @f1(<16 x i8> %val, ptr %ptr) {
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; CHECK-LABEL: f1:
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; CHECK: vst %v24, 0(%r2), 3
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; CHECK: br %r14
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store <16 x i8> %val, ptr %ptr
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ret void
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}
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; Test v8i16 stores.
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define void @f2(<8 x i16> %val, ptr %ptr) {
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; CHECK-LABEL: f2:
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; CHECK: vst %v24, 0(%r2), 3
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; CHECK: br %r14
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store <8 x i16> %val, ptr %ptr
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ret void
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}
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; Test v4i32 stores.
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define void @f3(<4 x i32> %val, ptr %ptr) {
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; CHECK-LABEL: f3:
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; CHECK: vst %v24, 0(%r2), 3
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; CHECK: br %r14
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store <4 x i32> %val, ptr %ptr
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ret void
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}
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; Test v2i64 stores.
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define void @f4(<2 x i64> %val, ptr %ptr) {
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; CHECK-LABEL: f4:
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; CHECK: vst %v24, 0(%r2), 3
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; CHECK: br %r14
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store <2 x i64> %val, ptr %ptr
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ret void
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}
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; Test v4f32 stores.
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define void @f5(<4 x float> %val, ptr %ptr) {
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; CHECK-LABEL: f5:
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; CHECK: vst %v24, 0(%r2), 3
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; CHECK: br %r14
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store <4 x float> %val, ptr %ptr
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ret void
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}
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; Test v2f64 stores.
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define void @f6(<2 x double> %val, ptr %ptr) {
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; CHECK-LABEL: f6:
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; CHECK: vst %v24, 0(%r2), 3
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; CHECK: br %r14
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store <2 x double> %val, ptr %ptr
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ret void
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}
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; Test the highest aligned in-range offset.
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define void @f7(<16 x i8> %val, ptr %base) {
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; CHECK-LABEL: f7:
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; CHECK: vst %v24, 4080(%r2), 3
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; CHECK: br %r14
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%ptr = getelementptr <16 x i8>, ptr %base, i64 255
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store <16 x i8> %val, ptr %ptr
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ret void
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}
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; Test the highest unaligned in-range offset.
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define void @f8(<16 x i8> %val, ptr %base) {
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; CHECK-LABEL: f8:
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; CHECK: vst %v24, 4095(%r2)
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; CHECK: br %r14
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%addr = getelementptr i8, ptr %base, i64 4095
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store <16 x i8> %val, ptr %addr, align 1
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ret void
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}
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; Test the next offset up, which requires separate address logic,
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define void @f9(<16 x i8> %val, ptr %base) {
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; CHECK-LABEL: f9:
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; CHECK: aghi %r2, 4096
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; CHECK: vst %v24, 0(%r2), 3
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; CHECK: br %r14
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%ptr = getelementptr <16 x i8>, ptr %base, i64 256
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store <16 x i8> %val, ptr %ptr
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ret void
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}
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; Test negative offsets, which also require separate address logic,
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define void @f10(<16 x i8> %val, ptr %base) {
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; CHECK-LABEL: f10:
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; CHECK: aghi %r2, -16
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; CHECK: vst %v24, 0(%r2), 3
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; CHECK: br %r14
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%ptr = getelementptr <16 x i8>, ptr %base, i64 -1
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store <16 x i8> %val, ptr %ptr
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ret void
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}
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; Check that indexes are allowed.
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define void @f11(<16 x i8> %val, ptr %base, i64 %index) {
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; CHECK-LABEL: f11:
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; CHECK: vst %v24, 0(%r3,%r2)
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; CHECK: br %r14
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%addr = getelementptr i8, ptr %base, i64 %index
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store <16 x i8> %val, ptr %addr, align 1
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ret void
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}
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; Test v2i8 stores.
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define void @f12(<2 x i8> %val, ptr %ptr) {
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; CHECK-LABEL: f12:
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; CHECK: vsteh %v24, 0(%r2), 0
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; CHECK: br %r14
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store <2 x i8> %val, ptr %ptr
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ret void
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}
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; Test v4i8 stores.
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define void @f13(<4 x i8> %val, ptr %ptr) {
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; CHECK-LABEL: f13:
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; CHECK: vstef %v24, 0(%r2)
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; CHECK: br %r14
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store <4 x i8> %val, ptr %ptr
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ret void
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}
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; Test v8i8 stores.
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define void @f14(<8 x i8> %val, ptr %ptr) {
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; CHECK-LABEL: f14:
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; CHECK: vsteg %v24, 0(%r2)
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; CHECK: br %r14
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store <8 x i8> %val, ptr %ptr
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ret void
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}
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; Test v2i16 stores.
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define void @f15(<2 x i16> %val, ptr %ptr) {
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; CHECK-LABEL: f15:
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; CHECK: vstef %v24, 0(%r2), 0
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; CHECK: br %r14
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store <2 x i16> %val, ptr %ptr
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ret void
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}
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; Test v4i16 stores.
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define void @f16(<4 x i16> %val, ptr %ptr) {
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; CHECK-LABEL: f16:
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; CHECK: vsteg %v24, 0(%r2)
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; CHECK: br %r14
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store <4 x i16> %val, ptr %ptr
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ret void
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}
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; Test v2i32 stores.
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define void @f17(<2 x i32> %val, ptr %ptr) {
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; CHECK-LABEL: f17:
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; CHECK: vsteg %v24, 0(%r2), 0
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; CHECK: br %r14
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store <2 x i32> %val, ptr %ptr
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ret void
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}
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; Test v2f32 stores.
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define void @f18(<2 x float> %val, ptr %ptr) {
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; CHECK-LABEL: f18:
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; CHECK: vsteg %v24, 0(%r2), 0
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; CHECK: br %r14
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store <2 x float> %val, ptr %ptr
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ret void
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}
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; Test quadword-aligned stores.
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define void @f19(<16 x i8> %val, ptr %ptr) {
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; CHECK-LABEL: f19:
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; CHECK: vst %v24, 0(%r2), 4
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; CHECK: br %r14
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store <16 x i8> %val, ptr %ptr, align 16
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ret void
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}
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; Test that the alignment hint for VST is emitted also when CFG optimizer
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; replaces two VSTs with just one that then carries two memoperands.
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define void @f20() {
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; CHECK-LABEL: f20:
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; CHECK: vst %v0, 0(%r1), 3
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; CHECK-NOT: vst
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entry:
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switch i32 undef, label %exit [
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i32 1, label %bb1
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i32 2, label %bb2
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]
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bb1:
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%C1 = call ptr @foo()
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%I1 = insertelement <2 x ptr> poison, ptr %C1, i64 0
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%S1 = shufflevector <2 x ptr> %I1, <2 x ptr> poison, <2 x i32> zeroinitializer
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store <2 x ptr> %S1, ptr undef, align 8
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br label %exit
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bb2:
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%C2 = call ptr @foo()
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%I2 = insertelement <2 x ptr> poison, ptr %C2, i64 0
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%S2 = shufflevector <2 x ptr> %I2, <2 x ptr> poison, <2 x i32> zeroinitializer
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store <2 x ptr> %S2, ptr undef, align 8
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br label %exit
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exit:
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ret void
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}
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declare ptr @foo()
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