e603451f3c
For more details about this feature, please refer to latest Intel 64 and IA-32 Architectures Optimization Reference Manual Volume 1: https://www.intel.com/content/www/us/en/content-details/821612/intel-64-and-ia-32-architectures-optimization-reference-manual-volume-1.html
75 lines
2.1 KiB
LLVM
75 lines
2.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc < %s -mtriple=x86_64 -mattr=+branch-hint -enable-branch-hint | FileCheck %s
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; RUN: llc < %s -mtriple=x86_64 -mattr=+branch-hint -enable-branch-hint -branch-hint-probability-threshold=50 | FileCheck %s
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; RUN: llc < %s -mtriple=x86_64 -mattr=+branch-hint -enable-branch-hint -branch-hint-probability-threshold=60 -tail-dup-placement=false | FileCheck --check-prefix=TH60 %s
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; Design: Add DS segment override prefix for condition branch who has high
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; probability to take (which is greater than the probability threshold of
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; enabling branch hint).
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define void @p51(i32 %x, ptr %p) {
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; CHECK-LABEL: p51:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: testl %edi, %edi
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; CHECK-NEXT: ds
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; CHECK-NEXT: je .LBB0_2
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; CHECK-NEXT: # %bb.1: # %if.then
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; CHECK-NEXT: movl %edi, (%rsi)
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; CHECK-NEXT: .LBB0_2: # %if.end
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; CHECK-NEXT: retq
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;
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; TH60-LABEL: p51:
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; TH60: # %bb.0: # %entry
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; TH60-NEXT: testl %edi, %edi
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; TH60-NEXT: je .LBB0_2
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; TH60-NEXT: # %bb.1: # %if.then
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; TH60-NEXT: movl %edi, (%rsi)
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; TH60-NEXT: .LBB0_2: # %if.end
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; TH60-NEXT: retq
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entry:
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%tobool.not = icmp eq i32 %x, 0
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br i1 %tobool.not, label %if.end, label %if.then, !prof !0
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if.then:
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store i32 %x, ptr %p, align 4
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br label %if.end
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if.end:
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ret void
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}
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define void @p61(i32 %x, ptr %p) {
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; CHECK-LABEL: p61:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: testl %edi, %edi
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; CHECK-NEXT: jne .LBB1_1
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; CHECK-NEXT: # %bb.2: # %if.end
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; CHECK-NEXT: retq
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; CHECK-NEXT: .LBB1_1: # %if.then
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; CHECK-NEXT: movl %edi, (%rsi)
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; CHECK-NEXT: retq
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;
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; TH60-LABEL: p61:
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; TH60: # %bb.0: # %entry
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; TH60-NEXT: testl %edi, %edi
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; TH60-NEXT: ds
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; TH60-NEXT: je .LBB1_2
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; TH60-NEXT: # %bb.1: # %if.then
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; TH60-NEXT: movl %edi, (%rsi)
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; TH60-NEXT: .LBB1_2: # %if.end
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; TH60-NEXT: retq
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entry:
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%tobool.not = icmp eq i32 %x, 0
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br i1 %tobool.not, label %if.end, label %if.then, !prof !1
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if.then:
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store i32 %x, ptr %p, align 4
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br label %if.end
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if.end:
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ret void
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}
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!0 = !{!"branch_weights", i32 51, i32 49}
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!1 = !{!"branch_weights", i32 61, i32 39} |