03de1cb715
InstCombine tries to swap compare operands to match sub instructions
in order to expose "CSE opportunities". However, it doesn't really
make sense to perform this transform in the middle-end, as we cannot
actually CSE the instructions there.
The backend already performs this fold in
18f5446a45/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp (L4236)
on the SDAG level, however this only works within a single basic block.
To handle cross-BB cases, we do need to handle this in the IR layer.
This patch moves the fold from InstCombine to CGP in the backend,
while keeping the same (somewhat dubious) heuristic.
Differential Revision: https://reviews.llvm.org/D152541
155 lines
3.7 KiB
LLVM
155 lines
3.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686--| FileCheck %s --check-prefixes=X86
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; RUN: llc < %s -mtriple=x86_64--| FileCheck %s --check-prefixes=X64
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;
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; PR35202
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;
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declare void @on_less()
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declare void @on_equal()
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declare void @on_greater()
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define void @eq_first(i32 %0, i32 %1) {
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; X86-LABEL: eq_first:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: cmpl %eax, {{[0-9]+}}(%esp)
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; X86-NEXT: jl on_less@PLT # TAILCALL
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; X86-NEXT: # %bb.1:
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; X86-NEXT: je on_equal@PLT # TAILCALL
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; X86-NEXT: # %bb.2:
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; X86-NEXT: jmp on_greater@PLT # TAILCALL
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;
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; X64-LABEL: eq_first:
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; X64: # %bb.0:
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; X64-NEXT: cmpl %esi, %edi
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; X64-NEXT: jl on_less@PLT # TAILCALL
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; X64-NEXT: # %bb.1:
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; X64-NEXT: je on_equal@PLT # TAILCALL
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; X64-NEXT: # %bb.2:
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; X64-NEXT: jmp on_greater@PLT # TAILCALL
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%3 = icmp slt i32 %0, %1
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br i1 %3, label %4, label %5
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4:
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tail call void @on_less()
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br label %9
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5:
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%6 = icmp eq i32 %0, %1
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br i1 %6, label %7, label %8
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7:
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tail call void @on_equal()
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br label %9
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8:
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tail call void @on_greater()
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br label %9
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9:
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ret void
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}
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define void @gt_first(i32 %0, i32 %1) {
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; X86-LABEL: gt_first:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: cmpl %eax, %ecx
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; X86-NEXT: jl on_less@PLT # TAILCALL
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; X86-NEXT: # %bb.1:
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; X86-NEXT: jg on_greater@PLT # TAILCALL
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; X86-NEXT: # %bb.2:
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; X86-NEXT: jmp on_equal@PLT # TAILCALL
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;
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; X64-LABEL: gt_first:
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; X64: # %bb.0:
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; X64-NEXT: cmpl %esi, %edi
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; X64-NEXT: jl on_less@PLT # TAILCALL
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; X64-NEXT: # %bb.1:
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; X64-NEXT: jg on_greater@PLT # TAILCALL
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; X64-NEXT: # %bb.2:
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; X64-NEXT: jmp on_equal@PLT # TAILCALL
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%3 = icmp slt i32 %0, %1
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br i1 %3, label %4, label %5
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4:
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tail call void @on_less()
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br label %9
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5:
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%6 = icmp slt i32 %1, %0
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br i1 %6, label %7, label %8
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7:
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tail call void @on_greater()
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br label %9
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8:
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tail call void @on_equal()
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br label %9
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9:
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ret void
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}
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define void @cmp_sub_same_order(i32 %x, i32 %y, ptr %p) {
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; X86-LABEL: cmp_sub_same_order:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: subl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: jge .LBB2_2
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; X86-NEXT: # %bb.1: # %cond.true
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl %eax, (%ecx)
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; X86-NEXT: .LBB2_2: # %cond.end
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; X86-NEXT: retl
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;
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; X64-LABEL: cmp_sub_same_order:
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; X64: # %bb.0: # %entry
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; X64-NEXT: subl %esi, %edi
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; X64-NEXT: jge .LBB2_2
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; X64-NEXT: # %bb.1: # %cond.true
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; X64-NEXT: movl %edi, (%rdx)
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; X64-NEXT: .LBB2_2: # %cond.end
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; X64-NEXT: retq
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entry:
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%cmp = icmp slt i32 %x, %y
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br i1 %cmp, label %cond.true, label %cond.end
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cond.true:
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%sub = sub nsw i32 %x, %y
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store i32 %sub, ptr %p
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br label %cond.end
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cond.end:
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ret void
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}
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define void @cmp_sub_different_order(i32 %x, i32 %y, ptr %p) {
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; X86-LABEL: cmp_sub_different_order:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: subl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: jge .LBB3_2
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; X86-NEXT: # %bb.1: # %cond.true
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl %eax, (%ecx)
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; X86-NEXT: .LBB3_2: # %cond.end
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; X86-NEXT: retl
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;
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; X64-LABEL: cmp_sub_different_order:
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; X64: # %bb.0: # %entry
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; X64-NEXT: subl %esi, %edi
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; X64-NEXT: jge .LBB3_2
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; X64-NEXT: # %bb.1: # %cond.true
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; X64-NEXT: movl %edi, (%rdx)
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; X64-NEXT: .LBB3_2: # %cond.end
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; X64-NEXT: retq
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entry:
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%cmp = icmp sgt i32 %y, %x
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br i1 %cmp, label %cond.true, label %cond.end
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cond.true:
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%sub = sub nsw i32 %x, %y
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store i32 %sub, ptr %p
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br label %cond.end
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cond.end:
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ret void
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}
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declare void @use(i32)
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