e9eaf19eb6
GCC supports code like "asm volatile ("" : "=r" (i) : "0" (f))" where i
is integer type and f is floating point type. Currently this code
produces an error with Clang. The change allows mixed scalar types
between input and output constraints.
Co-authored-by: Matt Arsenault <Matthew.Arsenault@amd.com>
62 lines
1.7 KiB
LLVM
62 lines
1.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
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; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr +avx < %s | FileCheck %s
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; The C source used as a base for generating this test:.
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; unsigned test(float f)
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; {
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; unsigned i;
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; // Copies f into the output operand i
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; asm volatile ("" : "=r" (i) : "0" (f));
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; return i;
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; }
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define i32 @test_int_float(float %f) {
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; CHECK-LABEL: test_int_float:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vmovd %xmm0, %eax
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; CHECK-NEXT: #APP
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: retq
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entry:
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%asm_call = call i32 asm sideeffect "", "=r,0,~{dirflag},~{fpsr},~{flags}"(float %f)
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ret i32 %asm_call
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}
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define i32 @test_int_ptr(ptr %f) {
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; CHECK-LABEL: test_int_ptr:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: #APP
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: # kill: def $eax killed $eax killed $rax
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; CHECK-NEXT: retq
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entry:
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%asm_call = call i32 asm sideeffect "", "=r,0,~{dirflag},~{fpsr},~{flags}"(ptr %f)
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ret i32 %asm_call
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}
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define i64 @test_int_vec(<4 x i16> %v) {
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; CHECK-LABEL: test_int_vec:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: #APP
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: vmovq %xmm0, %rax
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; CHECK-NEXT: retq
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entry:
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%asm_call = call i64 asm sideeffect "", "=v,0,~{dirflag},~{fpsr},~{flags}"(<4 x i16> %v)
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ret i64 %asm_call
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}
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define <4 x i32> @test_int_vec_float_vec(<4 x float> %f) {
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; CHECK-LABEL: test_int_vec_float_vec:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: #APP
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: retq
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entry:
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%asm_call = call <4 x i32> asm sideeffect "", "=v,0,~{dirflag},~{fpsr},~{flags}"(<4 x float> %f)
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ret <4 x i32> %asm_call
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}
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