21f23a37c6
memcpy has clamped dst stack alignment to NaturalStackAlignment if hasStackRealignment is false. We should also clamp stack alignment for memset and memmove. If we don't clamp, SelectionDAG may first do tail call optimization which requires no stack realignment. Then memmove, memset in same function may be lowered to load/store with larger alignment leading to PEI emit stack realignment code which is absolutely not correct. Reviewed By: LuoYuanke Differential Revision: https://reviews.llvm.org/D136456
162 lines
4.9 KiB
LLVM
162 lines
4.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; Make sure that we realign the stack. Mingw32 uses 4 byte stack alignment, we
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; need 16 bytes for SSE and 32 bytes for AVX.
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; RUN: llc < %s -mtriple=i386-pc-mingw32 -mcpu=pentium2 | FileCheck %s --check-prefix=NOSSE
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; RUN: llc < %s -stackrealign -mtriple=i386-pc-mingw32 -mcpu=pentium3 | FileCheck %s --check-prefix=SSE
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; RUN: llc < %s -stackrealign -mtriple=i386-pc-mingw32 -mcpu=yonah | FileCheck %s --check-prefix=SSE
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; RUN: llc < %s -stackrealign -mtriple=i386-pc-mingw32 -mcpu=corei7-avx | FileCheck %s --check-prefix=AVX
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; RUN: llc < %s -stackrealign -mtriple=i386-pc-mingw32 -mcpu=core-avx2 | FileCheck %s --check-prefix=AVX
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define void @test1(i32 %t) nounwind {
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; NOSSE-LABEL: test1:
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; NOSSE: # %bb.0:
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; NOSSE-NEXT: pushl %ebp
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; NOSSE-NEXT: movl %esp, %ebp
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; NOSSE-NEXT: subl $32, %esp
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; NOSSE-NEXT: movl 8(%ebp), %eax
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; NOSSE-NEXT: movl $0, -4(%ebp)
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; NOSSE-NEXT: movl $0, -8(%ebp)
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; NOSSE-NEXT: movl $0, -12(%ebp)
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; NOSSE-NEXT: movl $0, -16(%ebp)
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; NOSSE-NEXT: movl $0, -20(%ebp)
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; NOSSE-NEXT: movl $0, -24(%ebp)
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; NOSSE-NEXT: movl $0, -28(%ebp)
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; NOSSE-NEXT: movl $0, -32(%ebp)
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; NOSSE-NEXT: addl $3, %eax
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; NOSSE-NEXT: andl $-4, %eax
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; NOSSE-NEXT: calll __alloca
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; NOSSE-NEXT: movl %esp, %eax
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; NOSSE-NEXT: pushl %eax
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; NOSSE-NEXT: calll _dummy
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; NOSSE-NEXT: movl %ebp, %esp
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; NOSSE-NEXT: popl %ebp
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; NOSSE-NEXT: retl
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;
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; SSE-LABEL: test1:
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; SSE: # %bb.0:
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; SSE-NEXT: pushl %ebp
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; SSE-NEXT: movl %esp, %ebp
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; SSE-NEXT: pushl %esi
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; SSE-NEXT: andl $-16, %esp
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; SSE-NEXT: subl $48, %esp
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; SSE-NEXT: movl %esp, %esi
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; SSE-NEXT: movl 8(%ebp), %eax
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; SSE-NEXT: xorps %xmm0, %xmm0
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; SSE-NEXT: movaps %xmm0, 16(%esi)
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; SSE-NEXT: movaps %xmm0, (%esi)
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; SSE-NEXT: addl $3, %eax
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; SSE-NEXT: andl $-4, %eax
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; SSE-NEXT: calll __alloca
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; SSE-NEXT: movl %esp, %eax
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; SSE-NEXT: pushl %eax
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; SSE-NEXT: calll _dummy
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; SSE-NEXT: leal -4(%ebp), %esp
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; SSE-NEXT: popl %esi
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; SSE-NEXT: popl %ebp
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; SSE-NEXT: retl
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;
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; AVX-LABEL: test1:
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; AVX: # %bb.0:
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; AVX-NEXT: pushl %ebp
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; AVX-NEXT: movl %esp, %ebp
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; AVX-NEXT: pushl %esi
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; AVX-NEXT: andl $-32, %esp
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; AVX-NEXT: subl $64, %esp
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; AVX-NEXT: movl %esp, %esi
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; AVX-NEXT: movl 8(%ebp), %eax
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; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0
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; AVX-NEXT: vmovaps %ymm0, (%esi)
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; AVX-NEXT: addl $3, %eax
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; AVX-NEXT: andl $-4, %eax
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; AVX-NEXT: calll __alloca
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; AVX-NEXT: movl %esp, %eax
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; AVX-NEXT: pushl %eax
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; AVX-NEXT: vzeroupper
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; AVX-NEXT: calll _dummy
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; AVX-NEXT: leal -4(%ebp), %esp
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; AVX-NEXT: popl %esi
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; AVX-NEXT: popl %ebp
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; AVX-NEXT: retl
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%tmp1210 = alloca i8, i32 32, align 4
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call void @llvm.memset.p0.i64(ptr align 4 %tmp1210, i8 0, i64 32, i1 false)
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%x = alloca i8, i32 %t
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call void @dummy(ptr %x)
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ret void
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}
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define void @test2(i32 %t) nounwind {
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; NOSSE-LABEL: test2:
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; NOSSE: # %bb.0:
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; NOSSE-NEXT: pushl %ebp
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; NOSSE-NEXT: movl %esp, %ebp
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; NOSSE-NEXT: subl $16, %esp
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; NOSSE-NEXT: movl 8(%ebp), %eax
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; NOSSE-NEXT: movl $0, -4(%ebp)
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; NOSSE-NEXT: movl $0, -8(%ebp)
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; NOSSE-NEXT: movl $0, -12(%ebp)
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; NOSSE-NEXT: movl $0, -16(%ebp)
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; NOSSE-NEXT: addl $3, %eax
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; NOSSE-NEXT: andl $-4, %eax
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; NOSSE-NEXT: calll __alloca
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; NOSSE-NEXT: movl %esp, %eax
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; NOSSE-NEXT: pushl %eax
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; NOSSE-NEXT: calll _dummy
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; NOSSE-NEXT: movl %ebp, %esp
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; NOSSE-NEXT: popl %ebp
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; NOSSE-NEXT: retl
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;
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; SSE-LABEL: test2:
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; SSE: # %bb.0:
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; SSE-NEXT: pushl %ebp
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; SSE-NEXT: movl %esp, %ebp
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; SSE-NEXT: pushl %esi
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; SSE-NEXT: andl $-16, %esp
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; SSE-NEXT: subl $32, %esp
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; SSE-NEXT: movl %esp, %esi
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; SSE-NEXT: movl 8(%ebp), %eax
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; SSE-NEXT: xorps %xmm0, %xmm0
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; SSE-NEXT: movaps %xmm0, (%esi)
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; SSE-NEXT: addl $3, %eax
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; SSE-NEXT: andl $-4, %eax
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; SSE-NEXT: calll __alloca
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; SSE-NEXT: movl %esp, %eax
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; SSE-NEXT: pushl %eax
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; SSE-NEXT: calll _dummy
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; SSE-NEXT: leal -4(%ebp), %esp
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; SSE-NEXT: popl %esi
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; SSE-NEXT: popl %ebp
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; SSE-NEXT: retl
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;
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; AVX-LABEL: test2:
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; AVX: # %bb.0:
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; AVX-NEXT: pushl %ebp
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; AVX-NEXT: movl %esp, %ebp
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; AVX-NEXT: pushl %esi
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; AVX-NEXT: andl $-16, %esp
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; AVX-NEXT: subl $32, %esp
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; AVX-NEXT: movl %esp, %esi
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; AVX-NEXT: movl 8(%ebp), %eax
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; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0
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; AVX-NEXT: vmovaps %xmm0, (%esi)
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; AVX-NEXT: addl $3, %eax
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; AVX-NEXT: andl $-4, %eax
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; AVX-NEXT: calll __alloca
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; AVX-NEXT: movl %esp, %eax
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; AVX-NEXT: pushl %eax
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; AVX-NEXT: calll _dummy
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; AVX-NEXT: leal -4(%ebp), %esp
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; AVX-NEXT: popl %esi
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; AVX-NEXT: popl %ebp
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; AVX-NEXT: retl
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%tmp1210 = alloca i8, i32 16, align 4
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call void @llvm.memset.p0.i64(ptr align 4 %tmp1210, i8 0, i64 16, i1 false)
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%x = alloca i8, i32 %t
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call void @dummy(ptr %x)
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ret void
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}
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declare void @dummy(ptr)
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declare void @llvm.memset.p0.i64(ptr nocapture, i8, i64, i1) nounwind
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