f0dd12ec5c
The first attempt missed changing test files for tools (update_llc_test_checks.py). Original commit message: This implements the main suggested change from issue #56498. Using the shorter (non-extending) instruction with only -Oz ("minsize") rather than -Os ("optsize") is left as a possible follow-up. As noted in the bug report, the zero-extending load may have shorter latency/better throughput across a wide range of x86 micro-arches, and it avoids a potential false dependency. The cost is an extra instruction byte. This could cause perf ups and downs from secondary effects, but I don't think it is possible to account for those in advance, and that will likely also depend on exact micro-arch. This does bring LLVM x86 codegen more in line with existing gcc codegen, so if problems are exposed they are more likely to occur for both compilers. Differential Revision: https://reviews.llvm.org/D129775
42 lines
1.5 KiB
LLVM
42 lines
1.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s | FileCheck %s
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; make sure we compute the correct offset for a packed structure
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;Note: codegen for this could change rendering the above checks wrong
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target datalayout = "e-p:32:32"
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target triple = "i686-pc-linux-gnu"
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%struct.anon = type <{ i8, i32, i32, i32 }>
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@foos = external dso_local global %struct.anon ; <ptr> [#uses=3]
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@bara = weak global [4 x <{ i32, i8 }>] zeroinitializer ; <ptr> [#uses=2]
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define i32 @foo() nounwind {
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; CHECK-LABEL: foo:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: movl foos+5, %eax
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; CHECK-NEXT: addl foos+1, %eax
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; CHECK-NEXT: addl foos+9, %eax
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; CHECK-NEXT: retl
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entry:
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%tmp = load i32, ptr getelementptr (%struct.anon, ptr @foos, i32 0, i32 1) ; <i32> [#uses=1]
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%tmp3 = load i32, ptr getelementptr (%struct.anon, ptr @foos, i32 0, i32 2) ; <i32> [#uses=1]
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%tmp6 = load i32, ptr getelementptr (%struct.anon, ptr @foos, i32 0, i32 3) ; <i32> [#uses=1]
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%tmp4 = add i32 %tmp3, %tmp ; <i32> [#uses=1]
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%tmp7 = add i32 %tmp4, %tmp6 ; <i32> [#uses=1]
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ret i32 %tmp7
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}
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define i8 @bar() nounwind {
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; CHECK-LABEL: bar:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: movzbl bara+19, %eax
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; CHECK-NEXT: addb bara+4, %al
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; CHECK-NEXT: retl
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entry:
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%tmp = load i8, ptr getelementptr ([4 x <{ i32, i8 }>], ptr @bara, i32 0, i32 0, i32 1) ; <i8> [#uses=1]
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%tmp4 = load i8, ptr getelementptr ([4 x <{ i32, i8 }>], ptr @bara, i32 0, i32 3, i32 1) ; <i8> [#uses=1]
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%tmp5 = add i8 %tmp4, %tmp ; <i8> [#uses=1]
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ret i8 %tmp5
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}
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