f1d8345a2a
Currently we create register mappings for registers used only once in current
MBB. For registers with multiple uses, when all the uses are in the current MBB,
we can also create mappings for them similarly according to the last use.
For example
%reg101 = ...
= ... reg101
%reg103 = ADD %reg101, %reg102
We can create mapping between %reg101 and %reg103.
Differential Revision: https://reviews.llvm.org/D113193
79 lines
2.1 KiB
LLVM
79 lines
2.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+cmov | FileCheck %s
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define i32 @test1(i32 %X) {
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; CHECK-LABEL: test1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: movl $-2139062143, %edx # imm = 0x80808081
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; CHECK-NEXT: movl %ecx, %eax
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; CHECK-NEXT: imull %edx
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; CHECK-NEXT: leal (%edx,%ecx), %eax
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; CHECK-NEXT: movl %eax, %edx
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; CHECK-NEXT: shrl $31, %edx
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; CHECK-NEXT: sarl $7, %eax
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; CHECK-NEXT: addl %edx, %eax
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; CHECK-NEXT: movl %eax, %edx
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; CHECK-NEXT: shll $8, %edx
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; CHECK-NEXT: subl %edx, %eax
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; CHECK-NEXT: addl %ecx, %eax
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; CHECK-NEXT: retl
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%tmp1 = srem i32 %X, 255
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ret i32 %tmp1
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}
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define i32 @test2(i32 %X) {
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; CHECK-LABEL: test2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: leal 255(%eax), %ecx
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; CHECK-NEXT: testl %eax, %eax
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; CHECK-NEXT: cmovnsl %eax, %ecx
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; CHECK-NEXT: andl $-256, %ecx
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; CHECK-NEXT: subl %ecx, %eax
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; CHECK-NEXT: retl
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%tmp1 = srem i32 %X, 256
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ret i32 %tmp1
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}
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define i32 @test3(i32 %X) {
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; CHECK-LABEL: test3:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: movl $-2139062143, %edx # imm = 0x80808081
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; CHECK-NEXT: movl %ecx, %eax
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; CHECK-NEXT: mull %edx
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; CHECK-NEXT: shrl $7, %edx
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; CHECK-NEXT: movl %edx, %eax
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; CHECK-NEXT: shll $8, %eax
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; CHECK-NEXT: subl %eax, %edx
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; CHECK-NEXT: addl %edx, %ecx
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; CHECK-NEXT: movl %ecx, %eax
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; CHECK-NEXT: retl
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%tmp1 = urem i32 %X, 255
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ret i32 %tmp1
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}
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define i32 @test4(i32 %X) {
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; CHECK-LABEL: test4:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movzbl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: retl
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%tmp1 = urem i32 %X, 256
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ret i32 %tmp1
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}
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define i32 @test5(i32 %X) nounwind readnone {
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; CHECK-LABEL: test5:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: movl $41, %eax
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; CHECK-NEXT: xorl %edx, %edx
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; CHECK-NEXT: idivl {{[0-9]+}}(%esp)
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; CHECK-NEXT: movl %edx, %eax
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; CHECK-NEXT: retl
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entry:
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%0 = srem i32 41, %X
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ret i32 %0
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}
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