8961f3ee75
Currently shouldReduceLoadWidth is very relaxed about when loads can be split to avoid extractions from the original full width load - resulting in many cases where the number of memory operations notably increases, replacing the cost of a extract_subvector for additional loads. This patch adjusts the 256/512-bit vector load splitting metric to detect cases where ANY use of the full width load is be used directly - in which case we will now reuse that load for smaller types, unless we'd need to extract an upper subvector / integer element - i.e. we now correctly treat (extract_subvector cst, 0) as free. We retain the existing logic of never splitting loads if all uses are extract+stores but we improve this by peeking through bitcasts while looking for extract_subvector/store chains. This required a number of fixes - shouldReduceLoadWidth now needs to peek through bitcasts UP the use-chain to find final users (limited to hasOneUse cases to reduce complexity). It also exposed an issue in isTargetCanonicalConstantNode which assumed that a load of vector constant data would always extract, which is no longer the case.
142 lines
5.5 KiB
LLVM
142 lines
5.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx < %s | FileCheck %s --check-prefixes=AVX,AVX1
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; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx2 < %s | FileCheck %s --check-prefixes=AVX,AVX2
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; RUN: llc -mtriple=i386-unknown-linux-gnu -mcpu=knl < %s | FileCheck %s --check-prefixes=AVX,KNL-32
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; Verify that we don't crash during codegen due to a wrong lowering
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; of a setcc node with illegal operand types and return type.
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define <8 x i16> @pr25080(<8 x i32> %a) nounwind {
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; AVX1-LABEL: pr25080:
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; AVX1: # %bb.0: # %entry
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; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
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; AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}+16(%rip), %xmm0, %xmm0
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; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
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; AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
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; AVX1-NEXT: vpackssdw %xmm0, %xmm0, %xmm0
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; AVX1-NEXT: vpor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
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; AVX1-NEXT: vzeroupper
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: pr25080:
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; AVX2: # %bb.0: # %entry
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; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [8388607,8388607,8388607,8388607]
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; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm0
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; AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
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; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
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; AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
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; AVX2-NEXT: vpackssdw %xmm0, %xmm0, %xmm0
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; AVX2-NEXT: vpor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
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; AVX2-NEXT: vzeroupper
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; AVX2-NEXT: retq
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;
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; KNL-32-LABEL: pr25080:
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; KNL-32: # %bb.0: # %entry
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; KNL-32-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0
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; KNL-32-NEXT: vptestnmd {{\.?LCPI[0-9]+_[0-9]+}}{1to16}, %zmm0, %k0
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; KNL-32-NEXT: movb $15, %al
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; KNL-32-NEXT: kmovw %eax, %k1
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; KNL-32-NEXT: korw %k1, %k0, %k1
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; KNL-32-NEXT: vpternlogd {{.*#+}} zmm0 {%k1} {z} = -1
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; KNL-32-NEXT: vpmovdw %zmm0, %ymm0
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; KNL-32-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
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; KNL-32-NEXT: retl
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entry:
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%0 = trunc <8 x i32> %a to <8 x i23>
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%1 = icmp eq <8 x i23> %0, zeroinitializer
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%2 = or <8 x i1> %1, <i1 true, i1 true, i1 true, i1 true, i1 false, i1 false, i1 false, i1 false>
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%3 = sext <8 x i1> %2 to <8 x i16>
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ret <8 x i16> %3
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}
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define void @pr26232(i64 %a, <16 x i1> %b) nounwind {
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; AVX1-LABEL: pr26232:
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; AVX1: # %bb.0: # %allocas
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; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
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; AVX1-NEXT: .p2align 4
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; AVX1-NEXT: .LBB1_1: # %for_loop599
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; AVX1-NEXT: # =>This Inner Loop Header: Depth=1
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; AVX1-NEXT: cmpq $65536, %rdi # imm = 0x10000
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; AVX1-NEXT: setl %al
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; AVX1-NEXT: vmovd %eax, %xmm2
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; AVX1-NEXT: vpshufb %xmm1, %xmm2, %xmm2
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; AVX1-NEXT: vpand %xmm0, %xmm2, %xmm2
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; AVX1-NEXT: vpsllw $7, %xmm2, %xmm2
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; AVX1-NEXT: vpmovmskb %xmm2, %eax
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; AVX1-NEXT: testl %eax, %eax
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; AVX1-NEXT: jne .LBB1_1
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; AVX1-NEXT: # %bb.2: # %for_exit600
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: pr26232:
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; AVX2: # %bb.0: # %allocas
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; AVX2-NEXT: .p2align 4
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; AVX2-NEXT: .LBB1_1: # %for_loop599
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; AVX2-NEXT: # =>This Inner Loop Header: Depth=1
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; AVX2-NEXT: cmpq $65536, %rdi # imm = 0x10000
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; AVX2-NEXT: setl %al
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; AVX2-NEXT: vmovd %eax, %xmm1
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; AVX2-NEXT: vpbroadcastb %xmm1, %xmm1
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; AVX2-NEXT: vpand %xmm0, %xmm1, %xmm1
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; AVX2-NEXT: vpsllw $7, %xmm1, %xmm1
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; AVX2-NEXT: vpmovmskb %xmm1, %eax
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; AVX2-NEXT: testl %eax, %eax
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; AVX2-NEXT: jne .LBB1_1
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; AVX2-NEXT: # %bb.2: # %for_exit600
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; AVX2-NEXT: retq
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;
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; KNL-32-LABEL: pr26232:
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; KNL-32: # %bb.0: # %allocas
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; KNL-32-NEXT: vpmovsxbd %xmm0, %zmm0
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; KNL-32-NEXT: vpslld $31, %zmm0, %zmm0
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; KNL-32-NEXT: vptestmd %zmm0, %zmm0, %k0
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; KNL-32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; KNL-32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; KNL-32-NEXT: .p2align 4
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; KNL-32-NEXT: .LBB1_1: # %for_loop599
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; KNL-32-NEXT: # =>This Inner Loop Header: Depth=1
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; KNL-32-NEXT: cmpl $65536, %ecx # imm = 0x10000
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; KNL-32-NEXT: movl %eax, %edx
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; KNL-32-NEXT: sbbl $0, %edx
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; KNL-32-NEXT: setl %dl
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; KNL-32-NEXT: movzbl %dl, %edx
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; KNL-32-NEXT: negl %edx
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; KNL-32-NEXT: kmovw %edx, %k1
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; KNL-32-NEXT: kandw %k0, %k1, %k1
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; KNL-32-NEXT: kortestw %k1, %k1
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; KNL-32-NEXT: jne .LBB1_1
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; KNL-32-NEXT: # %bb.2: # %for_exit600
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; KNL-32-NEXT: retl
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allocas:
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br label %for_test11.preheader
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for_test11.preheader: ; preds = %for_test11.preheader, %allocas
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br i1 undef, label %for_loop599, label %for_test11.preheader
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for_loop599: ; preds = %for_loop599, %for_test11.preheader
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%less_i_load605_ = icmp slt i64 %a, 65536
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%less_i_load605__broadcast_init = insertelement <16 x i1> undef, i1 %less_i_load605_, i32 0
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%less_i_load605__broadcast = shufflevector <16 x i1> %less_i_load605__broadcast_init, <16 x i1> undef, <16 x i32> zeroinitializer
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%"oldMask&test607" = and <16 x i1> %less_i_load605__broadcast, %b
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%intmask.i894 = bitcast <16 x i1> %"oldMask&test607" to i16
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%res.i895 = icmp eq i16 %intmask.i894, 0
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br i1 %res.i895, label %for_exit600, label %for_loop599
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for_exit600: ; preds = %for_loop599
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ret void
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}
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define <4 x i32> @pcmpgt(<4 x i8> %x) nounwind {
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; AVX-LABEL: pcmpgt:
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; AVX: # %bb.0:
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; AVX-NEXT: vpmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
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; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
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; AVX-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0
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; AVX-NEXT: ret{{[l|q]}}
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%zext = zext <4 x i8> %x to <4 x i32>
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%icmp = icmp ne <4 x i32> %zext, zeroinitializer
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%sext = sext <4 x i1> %icmp to <4 x i32>
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ret <4 x i32> %sext
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}
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