f1987c74ee
Similar to 806761a7629df268c8aed49657aeccffa6bca449 -mtriple= specifies the full target triple while -march= merely sets the architecture part of the default target triple (e.g. Windows, macOS), leaving a target triple which may not make sense. Therefore, -march= is error-prone and not recommended for tests without a target triple. The issue has been benign as we recognize xcore-apple-darwin as ELF instead of rejecting it outrightly.
78 lines
1.5 KiB
LLVM
78 lines
1.5 KiB
LLVM
; RUN: llc < %s -mtriple=xcore -asm-verbose=0 | FileCheck %s
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define i32 @ashr(i32 %a, i32 %b) nounwind {
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%1 = ashr i32 %a, %b
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ret i32 %1
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}
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; CHECK-LABEL: ashr:
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; CHECK-NEXT: ashr r0, r0, r1
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define i32 @ashri1(i32 %a) nounwind {
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%1 = ashr i32 %a, 24
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ret i32 %1
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}
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; CHECK-LABEL: ashri1:
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; CHECK-NEXT: ashr r0, r0, 24
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define i32 @ashri2(i32 %a) nounwind {
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%1 = ashr i32 %a, 31
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ret i32 %1
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}
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; CHECK-LABEL: ashri2:
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; CHECK-NEXT: ashr r0, r0, 32
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define i32 @f1(i32 %a) nounwind nounwind {
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%1 = icmp slt i32 %a, 0
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br i1 %1, label %less, label %not_less
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less:
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ret i32 10
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not_less:
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ret i32 17
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}
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; CHECK-LABEL: f1:
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; CHECK-NEXT: ashr r0, r0, 32
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; CHECK-NEXT: bt r0
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define i32 @f2(i32 %a) nounwind {
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%1 = icmp sge i32 %a, 0
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br i1 %1, label %greater, label %not_greater
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greater:
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ret i32 10
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not_greater:
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ret i32 17
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}
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; CHECK-LABEL: f2:
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; CHECK-NEXT: ashr r0, r0, 32
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; CHECK-NEXT: bt r0
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define i32 @f3(i32 %a) nounwind {
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%1 = icmp slt i32 %a, 0
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%2 = select i1 %1, i32 10, i32 17
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ret i32 %2
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}
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; CHECK-LABEL: f3:
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; CHECK-NEXT: ashr r0, r0, 32
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; CHECK-NEXT: bt r0
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; CHECK-NEXT: ldc r0, 17
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; CHECK: ldc r0, 10
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define i32 @f4(i32 %a) nounwind {
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%1 = icmp sge i32 %a, 0
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%2 = select i1 %1, i32 10, i32 17
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ret i32 %2
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}
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; CHECK-LABEL: f4:
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; CHECK-NEXT: ashr r0, r0, 32
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; CHECK-NEXT: bt r0
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; CHECK-NEXT: ldc r0, 10
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; CHECK: ldc r0, 17
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define i32 @f5(i32 %a) nounwind {
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%1 = icmp sge i32 %a, 0
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%2 = zext i1 %1 to i32
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ret i32 %2
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}
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; CHECK-LABEL: f5:
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; CHECK-NEXT: not r0, r0
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; CHECK-NEXT: mkmsk r1, 5
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; CHECK-NEXT: shr r0, r0, r1
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