
Patch 1/4 adding bitcode support. Store whether or not a function is using Key Instructions in its DISubprogram so that we don't need to rely on the -mllvm flag -dwarf-use-key-instructions to determine whether or not to interpret Key Instructions metadata to decide is_stmt placement at DWARF emission time. This makes bitcode support simple and enables well defined mixing of non-key-instructions and key-instructions functions in an LTO context. This patch adds the bit (using DISubprogram::SubclassData1). PR 144104 and 144103 use it during DWARF emission. PR 44102 adds bitcode support. See pull request for overview of alternative attempts.
71 lines
3.2 KiB
LLVM
71 lines
3.2 KiB
LLVM
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; RUN: opt %s -S --passes=loop-unroll -unroll-runtime=true -unroll-count=4 -unroll-remainder -o - \
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; RUN: | FileCheck %s
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;; Check atoms are remapped for runtime unrolling.
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; CHECK: for.body.epil:
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; CHECK-NEXT: store i64 %indvars.iv.unr, ptr %p, align 4, !dbg [[G2R1:!.*]]
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; CHECK: for.body.epil.1:
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; CHECK-NEXT: store i64 %indvars.iv.next.epil, ptr %p, align 4, !dbg [[G3R1:!.*]]
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; CHECK: for.body.epil.2:
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; CHECK-NEXT: store i64 %indvars.iv.next.epil.1, ptr %p, align 4, !dbg [[G4R1:!.*]]
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; CHECK: for.body:
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; CHECK-NEXT: %indvars.iv = phi i64 [ 0, %for.body.lr.ph.new ], [ %indvars.iv.next.3, %for.body ]
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; CHECK-NEXT: %niter = phi i64 [ 0, %for.body.lr.ph.new ], [ %niter.next.3, %for.body ]
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; CHECK-NEXT: store i64 %indvars.iv, ptr %p, align 4, !dbg [[G1R1:!.*]]
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; CHECK-NEXT: %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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; CHECK-NEXT: store i64 %indvars.iv.next, ptr %p, align 4, !dbg [[G5R1:!.*]]
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; CHECK-NEXT: %indvars.iv.next.1 = add nuw nsw i64 %indvars.iv, 2
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; CHECK-NEXT: store i64 %indvars.iv.next.1, ptr %p, align 4, !dbg [[G6R1:!.*]]
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; CHECK-NEXT: %indvars.iv.next.2 = add nuw nsw i64 %indvars.iv, 3
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; CHECK-NEXT: store i64 %indvars.iv.next.2, ptr %p, align 4, !dbg [[G7R1:!.*]]
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; CHECK-NEXT: %indvars.iv.next.3 = add nuw nsw i64 %indvars.iv, 4
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; CHECK: distinct !DISubprogram(name: "unroll", {{.*}}keyInstructions: true)
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; CHECK: [[G2R1]] = !DILocation({{.*}}, atomGroup: 2, atomRank: 1)
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; CHECK: [[G3R1]] = !DILocation({{.*}}, atomGroup: 3, atomRank: 1)
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; CHECK: [[G4R1]] = !DILocation({{.*}}, atomGroup: 4, atomRank: 1)
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; CHECK: [[G1R1]] = !DILocation({{.*}}, atomGroup: 1, atomRank: 1)
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; CHECK: [[G5R1]] = !DILocation({{.*}}, atomGroup: 5, atomRank: 1)
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; CHECK: [[G6R1]] = !DILocation({{.*}}, atomGroup: 6, atomRank: 1)
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; CHECK: [[G7R1]] = !DILocation({{.*}}, atomGroup: 7, atomRank: 1)
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define i32 @unroll(ptr %p, i32 %N) local_unnamed_addr !dbg !5 {
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entry:
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%cmp9 = icmp eq i32 %N, 0
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br i1 %cmp9, label %for.cond.cleanup, label %for.body.lr.ph
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for.body.lr.ph: ; preds = %entry
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%wide.trip.count = zext i32 %N to i64
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br label %for.body
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for.cond.cleanup: ; preds = %for.body, %entry
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%r = phi i32 [ 0, %entry ], [ 1, %for.body ]
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ret i32 %r
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for.body: ; preds = %for.body, %for.body.lr.ph
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%indvars.iv = phi i64 [ 0, %for.body.lr.ph ], [ %indvars.iv.next, %for.body ]
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store i64 %indvars.iv, ptr %p, !dbg !8
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv.next, %wide.trip.count
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br i1 %exitcond, label %for.cond.cleanup, label %for.body
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}
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!llvm.dbg.cu = !{!0}
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!llvm.debugify = !{!2, !3}
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!llvm.module.flags = !{!4}
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!0 = distinct !DICompileUnit(language: DW_LANG_C, file: !1, producer: "debugify", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug)
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!1 = !DIFile(filename: "test.ll", directory: "/")
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!2 = !{i32 17}
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!3 = !{i32 0}
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!4 = !{i32 2, !"Debug Info Version", i32 3}
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!5 = distinct !DISubprogram(name: "unroll", linkageName: "unroll", scope: null, file: !1, line: 1, type: !6, scopeLine: 1, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, keyInstructions: true)
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!6 = !DISubroutineType(types: !7)
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!7 = !{}
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!8 = !DILocation(line: 1, column: 1, scope: !5, atomGroup: 1, atomRank: 1)
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