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llvm-project/llvm/test/CodeGen
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Noah Goldstein de7881ebf5 [DAGCombiner] Combine (select c, (and X, 1), 0) -> (and (zext c), X) 
The middle end canonicalizes:
`(and (zext c), X)`
    -> `(select c, (and X, 1), 0)`

But the `and` + `zext` form gets better codegen.
2023-09-28 13:46:46 -05:00
..
AArch64
[DAGCombiner] Combine (select c, (and X, 1), 0) -> (and (zext c), X)
2023-09-28 13:46:46 -05:00
AMDGPU
[AMDGPU] Make a check slightly more robust
2023-09-28 13:09:51 +01:00
ARC
…
ARM
[ARM] Make some test checks more robust
2023-09-28 14:26:13 +01:00
AVR
[RA] Split a virtual register in cold blocks if it is not assigned preferred physical register
2023-09-15 19:52:50 +00:00
BPF
Revert "Reapply [Verifier] Sanity check alloca size against DILocalVariable fragment size"
2023-09-18 17:24:53 +02:00
CSKY
[CSKY] Optimize multiplication with immediates
2023-08-08 14:13:49 +08:00
DirectX
[SPIRV][DX] Share one test between backends (#65975)
2023-09-21 12:15:55 +02:00
Generic
[MLGO] Move MBB Profile Dump test to Generic (#66856)
2023-09-20 11:50:33 -07:00
Hexagon
[CodeGen] Renumber slot indexes before register allocation (#66334)
2023-09-19 11:18:12 +01:00
Inputs
…
Lanai
[test] Change llc -march= to -mtriple= & llvm-mc -arch= to -triple=
2023-09-11 15:11:01 -07:00
LoongArch
[LoongArch] Improve codegen for i8/i16 'atomicrmw xchg a, {0,-1}'
2023-09-26 11:46:07 +08:00
M68k
[CodeGen] Add machine verification to some tests
2023-07-24 11:04:10 +01:00
Mips
[IRTranslator] Set NUW flag for inbounds gep and load/store offsets
2023-09-22 16:16:28 +02:00
MIR
[AArch64] Move PAuth codegen down the machine pipeline
2023-09-22 14:49:14 +03:00
MLRegAlloc
[MLGO] Move MBB Profile Dump test to Generic (#66856)
2023-09-20 11:50:33 -07:00
MSP430
…
NVPTX
Revert "[NVPTX] Add support for maxclusterrank in launch_bounds (#66496)"
2023-09-27 10:59:04 +02:00
PowerPC
Disable call to fma for soft-float
2023-09-28 14:06:54 +05:30
RISCV
[DAGCombiner] Combine (select c, (and X, 1), 0) -> (and (zext c), X)
2023-09-28 13:46:46 -05:00
SPARC
[SPARC] Add a missing SPARC64-LABEL check
2023-09-28 13:15:09 +01:00
SPIRV
[SPIRV] Add OpAccessChain instruction support (#66253)
2023-09-26 16:33:17 +02:00
SystemZ
[DAGCombiner] Combine (select c, (and X, 1), 0) -> (and (zext c), X)
2023-09-28 13:46:46 -05:00
Thumb
[Thumb1] Use callee-saved register to adjust stack pointer
2023-08-17 18:29:50 +01:00
Thumb2
[MachineLICM] Handle Subloops
2023-09-26 14:25:11 +01:00
VE
[DAG] SimplifyDemandedBits - if we're only demanding the msb, a UMIN/UMAX node can be simplified to a AND/OR node respectively.
2023-08-18 12:12:22 +01:00
WebAssembly
[MachineLICM] Handle Subloops
2023-09-26 14:25:11 +01:00
WinCFGuard
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WinEH
…
X86
[DAGCombiner] Combine (select c, (and X, 1), 0) -> (and (zext c), X)
2023-09-28 13:46:46 -05:00
XCore
[test] Change llc -march= to -mtriple=
2023-09-11 14:42:37 -07:00