llvm-project/llvm/test/CodeGen/SystemZ/inline-asm-addr.ll
Jonas Paulsson 46f83caebc [InlineAsm] Add support for address operands ("p").
This patch adds support for inline assembly address operands using the "p"
constraint on X86 and SystemZ.

This was in fact broken on X86 (see example at
https://reviews.llvm.org/D110267, Nov 23).

These operands should probably be treated the same as memory operands by
CodeGenPrepare, which have been commented with "TODO" there.

Review: Xiang Zhang and Ulrich Weigand

Differential Revision: https://reviews.llvm.org/D122220
2022-04-13 12:50:21 +02:00

58 lines
1.4 KiB
LLVM

; RUN: llc -mtriple=s390x-linux-gnu < %s | FileCheck %s
@Addr = global i64 0, align 8
@A = global i64* null, align 8
@Idx = global i64 0, align 8
define i64 @fun_BD12_p() {
; CHECK-LABEL: fun_BD12_p:
; CHECK: #APP
; CHECK: lay %r2, 800(%r1)
entry:
%0 = load i64*, i64** @A
%arrayidx = getelementptr inbounds i64, i64* %0, i64 100
%1 = tail call i64 asm "lay $0, $1", "=r,p"(i64* nonnull %arrayidx)
store i64 %1, i64* @Addr
ret i64 %1
}
define i64 @fun_BDX12_p() {
; CHECK-LABEL: fun_BDX12_p:
; CHECK: #APP
; CHECK: lay %r2, 800(%r1,%r2)
entry:
%0 = load i64*, i64** @A
%1 = load i64, i64* @Idx
%add = add nsw i64 %1, 100
%arrayidx = getelementptr inbounds i64, i64* %0, i64 %add
%2 = tail call i64 asm "lay $0, $1", "=r,p"(i64* %arrayidx)
store i64 %2, i64* @Addr
ret i64 %2
}
define i64 @fun_BD20_p() {
; CHECK-LABEL: fun_BD20_p:
; CHECK: #APP
; CHECK: lay %r2, 8000(%r1)
entry:
%0 = load i64*, i64** @A
%arrayidx = getelementptr inbounds i64, i64* %0, i64 1000
%1 = tail call i64 asm "lay $0, $1", "=r,p"(i64* nonnull %arrayidx)
store i64 %1, i64* @Addr
ret i64 %1
}
define i64 @fun_BDX20_p() {
; CHECK-LABEL: fun_BDX20_p:
; CHECK: #APP
; CHECK: lay %r2, 8000(%r1,%r2)
entry:
%0 = load i64*, i64** @A
%1 = load i64, i64* @Idx
%add = add nsw i64 %1, 1000
%arrayidx = getelementptr inbounds i64, i64* %0, i64 %add
%2 = tail call i64 asm "lay $0, $1", "=r,p"(i64* %arrayidx)
store i64 %2, i64* @Addr
ret i64 %2
}