Do not remove IMPLICIT_DEF of a physreg unless all uses have an undef flag added. Previously, only the first use instruction had undef flags added. This will cause a failure in machine instruction verification. Multi-instruction uses tested in AMDGPU/multi-use-implicit-def.mir and X86/multi-use-implicit-def.mir. --------- Signed-off-by: John Lu <John.Lu@amd.com>
43 lines
1.3 KiB
YAML
43 lines
1.3 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
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# Ensure processing an IMPLICIT_DEF of a physreg handles subreg definitions
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# and super-reg uses correctly.
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# RUN: llc -mtriple=amdgcn -mcpu=gfx802 -run-pass processimpdefs -asm-verbose=0 -verify-machineinstrs %s -o - | FileCheck %s
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# Must not add undef to use of implicit-def because def is partially redefined.
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---
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name: impdef_subreg_def
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tracksRegLiveness: true
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body: |
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bb.0:
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; CHECK-LABEL: name: impdef_subreg_def
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; CHECK: $sgpr0_sgpr1 = IMPLICIT_DEF
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; CHECK-NEXT: $sgpr0 = S_MOV_B32 0
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; CHECK-NEXT: $sgpr2_sgpr3 = COPY $sgpr0_sgpr1
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; CHECK-NEXT: S_ENDPGM 0
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$sgpr0_sgpr1 = IMPLICIT_DEF
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$sgpr0 = S_MOV_B32 0
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$sgpr2_sgpr3 = COPY $sgpr0_sgpr1
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S_ENDPGM 0
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...
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# Must not add undef to use of implicit-def because use is larger than implicit definition.
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---
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name: impdef_superreg_use
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tracksRegLiveness: true
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body: |
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bb.0:
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; CHECK-LABEL: name: impdef_superreg_use
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; CHECK: $sgpr0 = IMPLICIT_DEF
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; CHECK-NEXT: $sgpr1 = S_MOV_B32 0
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; CHECK-NEXT: $sgpr2_sgpr3 = COPY $sgpr0_sgpr1
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; CHECK-NEXT: S_ENDPGM 0
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$sgpr0 = IMPLICIT_DEF
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$sgpr1 = S_MOV_B32 0
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$sgpr2_sgpr3 = COPY $sgpr0_sgpr1
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S_ENDPGM 0
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...
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