llvm-project/llvm/test/CodeGen/AMDGPU/subreg-implicit-def.mir
LU-JOHN c245d764b8
[CodeGen] Do not remove IMPLICIT_DEF unless all uses have undef flag added (#188133)
Do not remove IMPLICIT_DEF of a physreg unless all uses have an undef
flag added. Previously, only the first use instruction had undef flags
added. This will cause a failure in machine instruction verification.
Multi-instruction uses tested in AMDGPU/multi-use-implicit-def.mir and
X86/multi-use-implicit-def.mir.

---------

Signed-off-by: John Lu <John.Lu@amd.com>
2026-04-01 10:11:42 -05:00

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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
# Ensure processing an IMPLICIT_DEF of a physreg handles subreg definitions
# and super-reg uses correctly.
# RUN: llc -mtriple=amdgcn -mcpu=gfx802 -run-pass processimpdefs -asm-verbose=0 -verify-machineinstrs %s -o - | FileCheck %s
# Must not add undef to use of implicit-def because def is partially redefined.
---
name: impdef_subreg_def
tracksRegLiveness: true
body: |
bb.0:
; CHECK-LABEL: name: impdef_subreg_def
; CHECK: $sgpr0_sgpr1 = IMPLICIT_DEF
; CHECK-NEXT: $sgpr0 = S_MOV_B32 0
; CHECK-NEXT: $sgpr2_sgpr3 = COPY $sgpr0_sgpr1
; CHECK-NEXT: S_ENDPGM 0
$sgpr0_sgpr1 = IMPLICIT_DEF
$sgpr0 = S_MOV_B32 0
$sgpr2_sgpr3 = COPY $sgpr0_sgpr1
S_ENDPGM 0
...
# Must not add undef to use of implicit-def because use is larger than implicit definition.
---
name: impdef_superreg_use
tracksRegLiveness: true
body: |
bb.0:
; CHECK-LABEL: name: impdef_superreg_use
; CHECK: $sgpr0 = IMPLICIT_DEF
; CHECK-NEXT: $sgpr1 = S_MOV_B32 0
; CHECK-NEXT: $sgpr2_sgpr3 = COPY $sgpr0_sgpr1
; CHECK-NEXT: S_ENDPGM 0
$sgpr0 = IMPLICIT_DEF
$sgpr1 = S_MOV_B32 0
$sgpr2_sgpr3 = COPY $sgpr0_sgpr1
S_ENDPGM 0
...