fc0653f31c
Recent upstream trends have moved away from explicitly using `-verify-machineinstrs`, as it's already covered by the expensive checks. This PR removes almost all `-verify-machineinstrs` from tests in `llvm/test/CodeGen/AMDGPU/*.ll`, leaving only those tests where its removal currently causes failures.
39 lines
1.9 KiB
LLVM
39 lines
1.9 KiB
LLVM
; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32 < %s | FileCheck -check-prefixes=GCN,GFX1032 %s
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; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32 < %s | FileCheck -check-prefixes=GCN,GFX1032 %s
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; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize64 < %s | FileCheck -check-prefixes=GCN,GFX1064 %s
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; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32 < %s | FileCheck -check-prefixes=GCN,GFX1032 %s
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; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32 < %s | FileCheck -check-prefixes=GCN,GFX1032 %s
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; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize64 < %s | FileCheck -check-prefixes=GCN,GFX1064 %s
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; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize64 < %s | FileCheck -check-prefixes=GCN,GFX1064 %s
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; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize64 < %s | FileCheck -check-prefixes=GCN,GFX1064 %s
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; GCN-LABEL: {{^}}test_init_exec:
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; GFX1032: s_mov_b32 exec_lo, 0x12345
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; GFX1064: s_mov_b64 exec, 0x12345
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; GCN: v_add_f32_e32 v0,
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define amdgpu_ps float @test_init_exec(float %a, float %b) {
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main_body:
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%s = fadd float %a, %b
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call void @llvm.amdgcn.init.exec(i64 74565)
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ret float %s
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}
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; GCN-LABEL: {{^}}test_init_exec_from_input:
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; GCN: s_bfe_u32 s0, s3, 0x70008
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; GFX1032: s_bfm_b32 exec_lo, s0, 0
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; GFX1032: s_cmp_eq_u32 s0, 32
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; GFX1032: s_cmov_b32 exec_lo, -1
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; GFX1064: s_bfm_b64 exec, s0, 0
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; GFX1064: s_cmp_eq_u32 s0, 64
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; GFX1064: s_cmov_b64 exec, -1
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; GCN: v_add_f32_e32 v0,
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define amdgpu_ps float @test_init_exec_from_input(i32 inreg, i32 inreg, i32 inreg, i32 inreg %count, float %a, float %b) {
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main_body:
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%s = fadd float %a, %b
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call void @llvm.amdgcn.init.exec.from.input(i32 %count, i32 8)
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ret float %s
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}
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declare void @llvm.amdgcn.init.exec(i64)
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declare void @llvm.amdgcn.init.exec.from.input(i32, i32)
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