fc0653f31c
Recent upstream trends have moved away from explicitly using `-verify-machineinstrs`, as it's already covered by the expensive checks. This PR removes almost all `-verify-machineinstrs` from tests in `llvm/test/CodeGen/AMDGPU/*.ll`, leaving only those tests where its removal currently causes failures.
30 lines
1.1 KiB
LLVM
30 lines
1.1 KiB
LLVM
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn < %s | FileCheck -check-prefix=GCN %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global < %s | FileCheck -check-prefix=GCN %s
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declare i32 @llvm.amdgcn.sffbh.i32(i32) #1
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; GCN-LABEL: {{^}}s_flbit:
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; GCN: s_load_dword [[VAL:s[0-9]+]],
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; GCN: s_flbit_i32 [[SRESULT:s[0-9]+]], [[VAL]]
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; GCN: v_mov_b32_e32 [[VRESULT:v[0-9]+]], [[SRESULT]]
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; GCN: buffer_store_dword [[VRESULT]],
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define amdgpu_kernel void @s_flbit(ptr addrspace(1) noalias %out, i32 %val) #0 {
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%r = call i32 @llvm.amdgcn.sffbh.i32(i32 %val)
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store i32 %r, ptr addrspace(1) %out, align 4
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ret void
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}
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; GCN-LABEL: {{^}}v_flbit:
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; GCN: buffer_load_dword [[VAL:v[0-9]+]],
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; GCN: v_ffbh_i32_e32 [[RESULT:v[0-9]+]], [[VAL]]
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; GCN: buffer_store_dword [[RESULT]],
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define amdgpu_kernel void @v_flbit(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %valptr) #0 {
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%val = load i32, ptr addrspace(1) %valptr, align 4
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%r = call i32 @llvm.amdgcn.sffbh.i32(i32 %val)
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store i32 %r, ptr addrspace(1) %out, align 4
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ret void
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}
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attributes #0 = { nounwind }
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attributes #1 = { nounwind readnone }
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