e0945dfa30
Since src_{private|shared}_{base|limit} registers are added and
are not artifical compiler happily uses it when it can. In HW
these registers do not exist and the encoding belongs to their
64-bit super-register or 32-bit low register. Same instructions
will produce relocation if run through asm.
58 lines
2.0 KiB
YAML
58 lines
2.0 KiB
YAML
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -start-before=register-coalescer -show-mc-encoding -o - %s | FileCheck %s
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# FIXME: These SRC_*_HI registers do not exist, although defined in the register file
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# and happily used by the coalescer. The resulting encoding is in fact belong
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# to the 64-bit register and corresponding *_LO 32-bit part of it.
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# CHECK-LABEL: src_private_base:
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# CHECK: s_subb_u32 s0, SRC_PRIVATE_BASE_HI, s1 ; encoding: [0xed,0x01,0x80,0x82]
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---
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name: src_private_base
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tracksRegLiveness: true
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body: |
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bb.0:
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%0:sreg_64 = COPY $src_private_base
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%1:sreg_64 = IMPLICIT_DEF
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$scc = IMPLICIT_DEF
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%2:sreg_32 = S_SUBB_U32 killed %0.sub1:sreg_64, %1.sub1:sreg_64, implicit-def dead $scc, implicit killed $scc
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...
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# CHECK-LABEL: src_private_limit:
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# CHECK: s_subb_u32 s0, SRC_PRIVATE_LIMIT_HI, s1 ; encoding: [0xee,0x01,0x80,0x82]
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---
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name: src_private_limit
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tracksRegLiveness: true
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body: |
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bb.0:
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%0:sreg_64 = COPY $src_private_limit
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%1:sreg_64 = IMPLICIT_DEF
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$scc = IMPLICIT_DEF
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%2:sreg_32 = S_SUBB_U32 killed %0.sub1:sreg_64, %1.sub1:sreg_64, implicit-def dead $scc, implicit killed $scc
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...
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# CHECK-LABEL: src_shared_base:
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# CHECK: s_subb_u32 s0, SRC_SHARED_BASE_HI, s1 ; encoding: [0xeb,0x01,0x80,0x82]
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---
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name: src_shared_base
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tracksRegLiveness: true
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body: |
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bb.0:
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%0:sreg_64 = COPY $src_shared_base
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%1:sreg_64 = IMPLICIT_DEF
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$scc = IMPLICIT_DEF
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%2:sreg_32 = S_SUBB_U32 killed %0.sub1:sreg_64, %1.sub1:sreg_64, implicit-def dead $scc, implicit killed $scc
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...
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# CHECK-LABEL: src_shared_limit:
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# CHECK: s_subb_u32 s0, SRC_SHARED_LIMIT_HI, s1 ; encoding: [0xec,0x01,0x80,0x82]
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---
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name: src_shared_limit
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tracksRegLiveness: true
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body: |
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bb.0:
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%0:sreg_64 = COPY $src_shared_limit
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%1:sreg_64 = IMPLICIT_DEF
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$scc = IMPLICIT_DEF
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%2:sreg_32 = S_SUBB_U32 killed %0.sub1:sreg_64, %1.sub1:sreg_64, implicit-def dead $scc, implicit killed $scc
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...
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