a8d7ad70aa
Both SGPR->VGPR and VGPR->AGPR spilling code give a fixup to the spill frame indices referred in debug instructions so that they can be entirely removed. We should skip the stack argument debug objects while looking inside the bitvector with FI as the index that tracks the spill indices being processed. The stack args will have negative indices and would crash while accessing the bitvector. Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D137277
57 lines
2.5 KiB
YAML
57 lines
2.5 KiB
YAML
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 -amdgpu-spill-vgpr-to-agpr=true -verify-machineinstrs -run-pass=prologepilog -o - %s | FileCheck %s
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# After handling the VGPR spill to AGPR copy, we replace the dead frame index in the DBG_VALUE instruction with reg 0.
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# Skip looking for frame indices in the debug value instruction for incoming arguments passed via stack. The test would crash otherwise.
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# It is safe to skip the fixed stack objects as they will never become the spill objects.
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--- |
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define amdgpu_kernel void @test() { ret void }
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!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !4, producer: "llvm", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !4, retainedTypes: !4)
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!1 = !DILocalVariable(name: "a", scope: !2, file: !4, line: 126, type: !6)
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!2 = distinct !DISubprogram(name: "test", scope: !4, file: !4, line: 1, type: !3, isLocal: false, isDefinition: true, scopeLine: 2, flags: DIFlagPrototyped, isOptimized: true, unit: !0, retainedNodes: !5)
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!3 = !DISubroutineType(types: !4)
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!4 = !{null}
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!5 = !{!1}
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!6 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !7, size: 64, align: 32)
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!7 = !DIBasicType(name: "int", size: 32, align: 32, encoding: DW_ATE_signed)
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!8 = !DIExpression()
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!9 = !DILocation(line: 10, column: 9, scope: !2)
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...
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---
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name: test
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tracksRegLiveness: true
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frameInfo:
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maxAlignment: 4
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fixedStack:
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- { id: 0, type: default, offset: 4, size: 4, alignment: 4, stack-id: default }
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stack:
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- { id: 0, type: spill-slot, size: 4, alignment: 4 }
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machineFunctionInfo:
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maxKernArgAlign: 4
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isEntryFunction: true
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waveLimiter: true
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scratchRSrcReg: '$sgpr96_sgpr97_sgpr98_sgpr99'
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stackPtrOffsetReg: '$sgpr32'
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frameOffsetReg: '$sgpr33'
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hasSpilledVGPRs: true
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argumentInfo:
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privateSegmentBuffer: { reg: '$sgpr0_sgpr1_sgpr2_sgpr3' }
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dispatchPtr: { reg: '$sgpr4_sgpr5' }
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kernargSegmentPtr: { reg: '$sgpr6_sgpr7' }
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workGroupIDX: { reg: '$sgpr8' }
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privateSegmentWaveByteOffset: { reg: '$sgpr9' }
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body: |
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; CHECK-LABEL: name: test
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; CHECK: bb.0:
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; CHECK: DBG_VALUE $noreg, 0
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bb.0:
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$vgpr2 = IMPLICIT_DEF
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SI_SPILL_V32_SAVE $vgpr2, %stack.0, $sgpr32, 0, implicit $exec :: (store (s32) into %stack.0, align 4, addrspace 5)
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DBG_VALUE %fixed-stack.0, 0, !1, !8, debug-location !9
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bb.1:
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renamable $vgpr2 = SI_SPILL_V32_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.0, align 4, addrspace 5)
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S_ENDPGM 0
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