32febe60f3
Support the following packed BCD builtins for PowerPC. ``` __builtin_national2packed - Conversion of National format to Packed decimal format. __builtin_packed2national - Conversion of Packed decimal format to national format. __builtin_packed2zoned - Conversion of Packed decimal format to Zoned decimal format. __builtin_zoned2packed - Conversion of Zoned decimal format to Packed decimal format. ``` ### Prototypes: `vector unsigned char __builtin_national2packed(vector unsigned char a, unsigned char b);` `vector unsigned char __builtin_packed2zoned(vector unsigned char, unsigned char);` `vector unsigned char __builtin_zoned2packed(vector unsigned char, unsigned char);` The condition for the 2nd parameter is consistent over all the 3 prototypes (0 or 1 only). `vector unsigned char __builtin_packed2national(vector unsigned char);` Co-authored-by: himadhith <himadhith.v@ibm.com> Co-authored-by: Tony Varghese <tonypalampalliyil@gmail.com>
92 lines
2.9 KiB
LLVM
92 lines
2.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; Testfile that verifies positive case (0 or 1 only) for BCD builtins national2packed, packed2zoned and zoned2packed.
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; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown \
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; RUN: -ppc-asm-full-reg-names < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple=powerpc64-unknown-unknown \
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; RUN: -ppc-asm-full-reg-names < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple=powerpc-unknown-unknown \
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; RUN: -ppc-asm-full-reg-names < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple=powerpc64-ibm-aix-xcoff \
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; RUN: -ppc-asm-full-reg-names < %s | FileCheck %s
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declare <16 x i8> @llvm.ppc.national2packed(<16 x i8>, i32 immarg)
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define <16 x i8> @tBcd_National2packed_imm0(<16 x i8> %a) {
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; CHECK-LABEL: tBcd_National2packed_imm0:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: bcdcfn. v2, v2, 0
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; CHECK-NEXT: blr
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entry:
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%0 = call <16 x i8> @llvm.ppc.national2packed(<16 x i8> %a, i32 0)
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ret <16 x i8> %0
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}
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define <16 x i8> @tBcd_National2packed_imm1(<16 x i8> %a) {
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; CHECK-LABEL: tBcd_National2packed_imm1:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: bcdcfn. v2, v2, 1
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; CHECK-NEXT: blr
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entry:
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%0 = call <16 x i8> @llvm.ppc.national2packed(<16 x i8> %a, i32 1)
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ret <16 x i8> %0
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}
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declare <16 x i8> @llvm.ppc.packed2national(<16 x i8>)
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define <16 x i8> @tBcd_Packed2national(<16 x i8> %a) {
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; CHECK-LABEL: tBcd_Packed2national:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: bcdctn. v2, v2
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; CHECK-NEXT: blr
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entry:
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%0 = call <16 x i8> @llvm.ppc.packed2national(<16 x i8> %a)
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ret <16 x i8> %0
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}
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declare <16 x i8> @llvm.ppc.packed2zoned(<16 x i8>, i32 immarg)
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define <16 x i8> @tBcd_Packed2zoned_imm0(<16 x i8> %a) {
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; CHECK-LABEL: tBcd_Packed2zoned_imm0:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: bcdctz. v2, v2, 0
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; CHECK-NEXT: blr
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entry:
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%0 = call <16 x i8> @llvm.ppc.packed2zoned(<16 x i8> %a, i32 0)
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ret <16 x i8> %0
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}
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define <16 x i8> @tBcd_Packed2zoned_imm1(<16 x i8> %a) {
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; CHECK-LABEL: tBcd_Packed2zoned_imm1:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: bcdctz. v2, v2, 1
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; CHECK-NEXT: blr
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entry:
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%0 = call <16 x i8> @llvm.ppc.packed2zoned(<16 x i8> %a, i32 1)
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ret <16 x i8> %0
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}
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declare <16 x i8> @llvm.ppc.zoned2packed(<16 x i8>, i32 immarg)
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define <16 x i8> @tBcd_Zoned2packed_imm0(<16 x i8> %a) {
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; CHECK-LABEL: tBcd_Zoned2packed_imm0:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: bcdcfz. v2, v2, 0
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; CHECK-NEXT: blr
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entry:
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%0 = call <16 x i8> @llvm.ppc.zoned2packed(<16 x i8> %a, i32 0)
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ret <16 x i8> %0
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}
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define <16 x i8> @tBcd_Zoned2packed_imm1(<16 x i8> %a) {
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; CHECK-LABEL: tBcd_Zoned2packed_imm1:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: bcdcfz. v2, v2, 1
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; CHECK-NEXT: blr
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entry:
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%0 = call <16 x i8> @llvm.ppc.zoned2packed(<16 x i8> %a, i32 1)
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ret <16 x i8> %0
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}
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