llvm-project/llvm/test/CodeGen/PowerPC/tocdata-firm-alignment.ll
Kai Luo 117921e071
[PowerPC] Alignment of toc-data symbol should not be increased during optimizations (#94593)
Currently, the alignment of toc-data symbol might be changed during
instcombine
```
IC: Visiting:   %global = alloca %struct.widget, align 8                                                                                         
Found alloca equal to global:   %global = alloca %struct.widget, align 8                                                                         
  memcpy =   call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 1 %global, ptr align 1 @global, i64 3, i1 false)
```
The `alloca` is created with `PrefAlign` which is 8 and after IC, the
alignment of `@global` is enforced into `8`, same as the `alloca`. This
is not expected, since toc-data symbol has the same alignment as toc
entry and should not be increased during optimizations.

---------

Co-authored-by: Sean Fertile <sd.fertile@gmail.com>
Co-authored-by: Eli Friedman <efriedma@quicinc.com>
2024-06-18 09:58:37 +08:00

25 lines
920 B
LLVM

; RUN: opt -S -passes='default<O3>' < %s | FileCheck %s
target datalayout = "E-m:a-p:32:32-Fi32-i64:64-n32"
target triple = "powerpc-ibm-aix7.2.0.0"
%struct.widget = type { i8, i8, i8 }
; CHECK: @global = {{.*}}constant %struct.widget { i8 4, i8 0, i8 0 }, align 4 #0
@global = constant %struct.widget { i8 4, i8 0, i8 0 }, align 4 #0
define void @baz() #1 {
bb:
call void @snork(ptr @global)
ret void
}
define void @snork(ptr byval(%struct.widget) %arg) #1 {
bb:
%load = load volatile ptr, ptr null, align 4
ret void
}
attributes #0 = { "toc-data" }
attributes #1 = { "target-cpu"="pwr7" "target-features"="+altivec,+bpermd,+extdiv,+isa-v206-instructions,+vsx,-aix-shared-lib-tls-model-opt,-aix-small-local-dynamic-tls,-aix-small-local-exec-tls,-crbits,-crypto,-direct-move,-htm,-isa-v207-instructions,-isa-v30-instructions,-power8-vector,-power9-vector,-privileged,-quadword-atomics,-rop-protect,-spe" }