db64e69fa2
As described in #98883, we have to qualify a module variable name in debugger to get its value. This PR tries to remove this limitation. LLVM provides `DIImportedEntity` to handle such cases but the PR is made more complicated due to the following 2 issues. 1. The MLIR attributes are readonly and we have a circular dependency here. This has to be handled using the recursive interface provided by the MLIR. This requires us to first create a place holder `DISubprogramAttr` which is used in creating `DIImportedEntityAttr`. Later another `DISubprogramAttr` is created which replaces the place holder. 2. The flang IR does not provide any information about the 'used' module so this has to be extracted by doing a pass over the `DeclareOp` in the function. This presents certain limitation as 'only' and module variable renaming may not be handled properly. Due to the change in `DISubprogramAttr`, some tests also needed to be adjusted. Fixes #98883.
26 lines
1.4 KiB
Plaintext
26 lines
1.4 KiB
Plaintext
// RUN: fir-opt --add-debug-info --mlir-print-debuginfo %s -o - | FileCheck %s
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// This test checks that debug information for fir.real type works ok.
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module attributes {dlti.dl_spec = #dlti.dl_spec<>} {
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func.func @_QPfn1(%arg0: !fir.ref<!fir.complex<8>> {fir.bindc_name = "a"} ) {
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%0 = fir.declare %arg0 {uniq_name = "_QFfn1Ea"} : (!fir.ref<!fir.complex<8>>) -> !fir.ref<!fir.complex<8>>
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%1 = fir.alloca f32 {bindc_name = "abserror", uniq_name = "_QFfn1Eabserror"}
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%2 = fir.declare %1 {uniq_name = "_QFfn1Eabserror"} : (!fir.ref<f32>) -> !fir.ref<f32>
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%3 = fir.load %0 : !fir.ref<!fir.complex<8>>
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%4 = fir.extract_value %3, [0 : i32] : (!fir.complex<8>) -> !fir.real<8>
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%5 = fir.extract_value %3, [1 : i32] : (!fir.complex<8>) -> !fir.real<8>
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%6 = fir.call @cabs(%4, %5) : (!fir.real<8>, !fir.real<8>) -> f64
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%7 = fir.convert %6 : (f64) -> f32
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fir.store %7 to %2 : !fir.ref<f32>
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return
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} loc(#loc1)
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func.func private @cabs(!fir.real<8>, !fir.real<8>) -> f64 attributes {fir.bindc_name = "cabs", fir.runtime}
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} loc(#loc)
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#loc1 = loc("test.f90":5:1)
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#loc = loc("test.f90":0:0)
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// CHECK-DAG: #[[TY:.*]] = #llvm.di_basic_type<tag = DW_TAG_base_type, name = "real", sizeInBits = 64, encoding = DW_ATE_float>
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// CHECK-DAG: #[[TY1:.*]] = #llvm.di_subroutine_type<callingConvention = DW_CC_normal, types = #[[TY]], #[[TY]], #[[TY]]>
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// CHECK-DAG: #{{.*}} = #llvm.di_subprogram<{{.*}}name = "cabs", linkageName = "cabs"{{.*}}, type = #[[TY1]]>
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