1ed7d2119e
Summary: Reported in https://github.com/opencv/opencv/issues/15413. We have serveral extended mnemonics for Move To/From Vector-Scalar Register Instructions eg: mffprd,mtfprd etc. We only support one of them, this patch add the others. Reviewers: nemanjai, steven.zhang, hfinkel, #powerpc Reviewed By: hfinkel Subscribers: wuzish, qcolombet, hiraditya, kbarton, MaskRay, shchenz, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D66963 llvm-svn: 370411
47 lines
1.3 KiB
LLVM
47 lines
1.3 KiB
LLVM
; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-linux-gnu < %s \
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; RUN: -verify-machineinstrs | FileCheck %s
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; RUN: llc -mcpu=pwr7 -mtriple=powerpc64le-unknown-linux-gnu < %s \
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; RUN: -verify-machineinstrs | FileCheck -check-prefix=CHECK-PWR7 %s
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define double @test_setrndi() {
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entry:
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%0 = tail call double @llvm.ppc.setrnd(i32 2)
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ret double %0
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; CHECK-LABEL: @test_setrndi
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; CHECK: # %bb.0:
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; CHECK-DAG: mffs 1
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; CHECK-DAG: mtfsb0 31
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; CHECK-DAG: mtfsb1 30
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; CHECK: blr
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}
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define double @test_setrnd(i32 signext %x) {
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entry:
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%0 = tail call double @llvm.ppc.setrnd(i32 %x)
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ret double %0
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; CHECK-LABEL: @test_setrnd
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; CHECK: # %bb.0:
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; CHECK-DAG: mffs 1
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; CHECK-DAG: mffprd [[REG1:[0-9]+]], 1
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; CHECK-DAG: rldimi [[REG1]], 3, 0, 62
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; CHECK-DAG: mtfprd [[REG2:[0-9]+]], [[REG1]]
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; CHECK-DAG: mtfsf 255, [[REG2]]
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; CHECK: blr
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; CHECK-PWR7-LABEL: @test_setrnd
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; CHECK-PWR7: # %bb.0:
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; CHECK-PWR7-DAG: mffs 1
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; CHECK-PWR7-DAG: stfd 1, -8(1)
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; CHECK-PWR7-DAG: ld [[REG1:[0-9]+]], -8(1)
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; CHECK-PWR7-DAG: rldimi [[REG1]], 3, 0, 62
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; CHECK-PWR7-DAG: std [[REG1]], -16(1)
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; CHECK-PWR7-DAG: lfd [[REG2:[0-9]+]], -16(1)
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; CHECK-PWR7-DAG: mtfsf 255, [[REG2]]
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; CHECK-PWR7: blr
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}
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declare double @llvm.ppc.setrnd(i32)
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