9802268ad3
In loop-vectorize, interleave count and vector factor depend on target register number. Currently, it does not estimate different register pressure for different register class separately(especially for scalar type, float type should not be on the same position with int type), so it's not accurate. Specifically, it causes too many times interleaving/unrolling, result in too many register spills in loop body and hurting performance. So we need classify the register classes in IR level, and importantly these are abstract register classes, and are not the target register class of backend provided in td file. It's used to establish the mapping between the types of IR values and the number of simultaneous live ranges to which we'd like to limit for some set of those types. For example, POWER target, register num is special when VSX is enabled. When VSX is enabled, the number of int scalar register is 32(GPR), float is 64(VSR), but for int and float vector register both are 64(VSR). So there should be 2 kinds of register class when vsx is enabled, and 3 kinds of register class when VSX is NOT enabled. It runs on POWER target, it makes big(+~30%) performance improvement in one specific bmk(503.bwaves_r) of spec2017 and no other obvious degressions. Differential revision: https://reviews.llvm.org/D67148 llvm-svn: 374634
143 lines
6.8 KiB
LLVM
143 lines
6.8 KiB
LLVM
; RUN: opt < %s -debug-only=loop-vectorize -loop-vectorize -mtriple=x86_64-unknown-linux -S 2>&1 | FileCheck %s
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; REQUIRES: asserts
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; Test that the register usage estimation is not affected by the presence of
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; debug intrinsics.
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;
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; In the test below the values %0 and %r.08 are ended in the add instruction
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; preceding the call to the intrinsic, and will be recorded against the index
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; of the call instruction. This means the debug intrinsic must be considered
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; when erasing instructions from the list of open-intervals.
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;
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; Tests generated from following source (with and without -g):
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; unsigned test(unsigned *a, unsigned n) {
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; unsigned i, r = 0;
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; for(i = 0; i < n; i++)
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; r += a[i];
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; return r;
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; }
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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; CHECK: LV: Checking a loop in "test_g"
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; CHECK: LV(REG): Found max usage: 2 item
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; CHECK-NEXT: LV(REG): RegisterClass: Generic::ScalarRC, 2 registers
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; CHECK-NEXT: LV(REG): RegisterClass: Generic::VectorRC, 2 registers
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; CHECK-NEXT: LV(REG): Found invariant usage: 1 item
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; CHECK-NEXT: LV(REG): RegisterClass: Generic::VectorRC, 2 registers
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define i32 @test_g(i32* nocapture readonly %a, i32 %n) local_unnamed_addr !dbg !6 {
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entry:
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tail call void @llvm.dbg.value(metadata i32* %a, i64 0, metadata !12, metadata !16), !dbg !17
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tail call void @llvm.dbg.value(metadata i32 %n, i64 0, metadata !13, metadata !16), !dbg !18
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tail call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !15, metadata !16), !dbg !19
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tail call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !14, metadata !16), !dbg !20
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tail call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !15, metadata !16), !dbg !19
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tail call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !14, metadata !16), !dbg !20
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%cmp6 = icmp eq i32 %n, 0, !dbg !21
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br i1 %cmp6, label %for.end, label %for.body.preheader, !dbg !25
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for.body.preheader: ; preds = %entry
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%wide.trip.count = zext i32 %n to i64, !dbg !21
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br label %for.body, !dbg !27
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for.body: ; preds = %for.body.preheader, %for.body
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%indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %for.body.preheader ]
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%r.08 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ]
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%arrayidx = getelementptr inbounds i32, i32* %a, i64 %indvars.iv, !dbg !27
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%0 = load i32, i32* %arrayidx, align 4, !dbg !27, !tbaa !28
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%add = add i32 %0, %r.08, !dbg !32
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tail call void @llvm.dbg.value(metadata i32 %add, i64 0, metadata !15, metadata !16), !dbg !19
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1, !dbg !33
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tail call void @llvm.dbg.value(metadata i32 %add, i64 0, metadata !15, metadata !16), !dbg !19
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%exitcond = icmp eq i64 %indvars.iv.next, %wide.trip.count, !dbg !21
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br i1 %exitcond, label %for.end.loopexit, label %for.body, !dbg !25, !llvm.loop !35
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for.end.loopexit: ; preds = %for.body
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br label %for.end, !dbg !38
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for.end: ; preds = %for.end.loopexit, %entry
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%r.0.lcssa = phi i32 [ 0, %entry ], [ %add, %for.end.loopexit ]
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ret i32 %r.0.lcssa, !dbg !38
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}
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; CHECK: LV: Checking a loop in "test"
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; CHECK: LV(REG): Found max usage: 2 item
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; CHECK-NEXT: LV(REG): RegisterClass: Generic::ScalarRC, 2 registers
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; CHECK-NEXT: LV(REG): RegisterClass: Generic::VectorRC, 2 registers
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; CHECK-NEXT: LV(REG): Found invariant usage: 1 item
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; CHECK-NEXT: LV(REG): RegisterClass: Generic::VectorRC, 2 registers
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define i32 @test(i32* nocapture readonly %a, i32 %n) local_unnamed_addr {
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entry:
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%cmp6 = icmp eq i32 %n, 0
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br i1 %cmp6, label %for.end, label %for.body.preheader
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for.body.preheader: ; preds = %entry
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%wide.trip.count = zext i32 %n to i64
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br label %for.body
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for.body: ; preds = %for.body.preheader, %for.body
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%indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %for.body.preheader ]
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%r.08 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ]
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%arrayidx = getelementptr inbounds i32, i32* %a, i64 %indvars.iv
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%0 = load i32, i32* %arrayidx, align 4, !tbaa !28
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%add = add i32 %0, %r.08
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv.next, %wide.trip.count
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br i1 %exitcond, label %for.end.loopexit, label %for.body
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for.end.loopexit: ; preds = %for.body
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br label %for.end
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for.end: ; preds = %for.end.loopexit, %entry
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%r.0.lcssa = phi i32 [ 0, %entry ], [ %add, %for.end.loopexit ]
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ret i32 %r.0.lcssa
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}
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declare void @llvm.dbg.value(metadata, i64, metadata, metadata)
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!llvm.dbg.cu = !{!0}
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!llvm.module.flags = !{!3, !4}
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!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2)
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!1 = !DIFile(filename: "test.c", directory: "")
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!2 = !{}
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!3 = !{i32 2, !"Dwarf Version", i32 4}
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!4 = !{i32 2, !"Debug Info Version", i32 3}
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!6 = distinct !DISubprogram(name: "test_g", scope: !1, file: !1, line: 1, type: !7, isLocal: false, isDefinition: true, scopeLine: 1, flags: DIFlagPrototyped, isOptimized: true, unit: !0, retainedNodes: !11)
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!7 = !DISubroutineType(types: !8)
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!8 = !{!9, !10, !9}
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!9 = !DIBasicType(name: "unsigned int", size: 32, encoding: DW_ATE_unsigned)
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!10 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !9, size: 64)
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!11 = !{!12, !13, !14, !15}
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!12 = !DILocalVariable(name: "a", arg: 1, scope: !6, file: !1, line: 1, type: !10)
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!13 = !DILocalVariable(name: "n", arg: 2, scope: !6, file: !1, line: 1, type: !9)
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!14 = !DILocalVariable(name: "i", scope: !6, file: !1, line: 2, type: !9)
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!15 = !DILocalVariable(name: "r", scope: !6, file: !1, line: 2, type: !9)
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!16 = !DIExpression()
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!17 = !DILocation(line: 1, column: 27, scope: !6)
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!18 = !DILocation(line: 1, column: 39, scope: !6)
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!19 = !DILocation(line: 2, column: 15, scope: !6)
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!20 = !DILocation(line: 2, column: 12, scope: !6)
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!21 = !DILocation(line: 3, column: 16, scope: !22)
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!22 = !DILexicalBlockFile(scope: !23, file: !1, discriminator: 1)
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!23 = distinct !DILexicalBlock(scope: !24, file: !1, line: 3, column: 3)
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!24 = distinct !DILexicalBlock(scope: !6, file: !1, line: 3, column: 3)
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!25 = !DILocation(line: 3, column: 3, scope: !26)
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!26 = !DILexicalBlockFile(scope: !24, file: !1, discriminator: 1)
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!27 = !DILocation(line: 4, column: 10, scope: !23)
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!28 = !{!29, !29, i64 0}
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!29 = !{!"int", !30, i64 0}
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!30 = !{!"omnipotent char", !31, i64 0}
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!31 = !{!"Simple C/C++ TBAA"}
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!32 = !DILocation(line: 4, column: 7, scope: !23)
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!33 = !DILocation(line: 3, column: 22, scope: !34)
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!34 = !DILexicalBlockFile(scope: !23, file: !1, discriminator: 2)
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!35 = distinct !{!35, !36, !37}
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!36 = !DILocation(line: 3, column: 3, scope: !24)
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!37 = !DILocation(line: 4, column: 13, scope: !24)
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!38 = !DILocation(line: 5, column: 3, scope: !6)
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