shylie/llvm-project
1
0
Fork 0
Code Issues Pull Requests Actions 6 Packages Projects Releases Wiki Activity
llvm-project/llvm/test/CodeGen
History
Pete Cooper e13d0992dc Add objc.* ARC intrinsics and codegen them to their runtime methods. 
Reviewers: erik.pilkington, ahatanak

Differential Revision: https://reviews.llvm.org/D55233

llvm-svn: 348441
2018-12-06 00:52:54 +00:00
..
AArch64
[GlobalISel] Introduce G_BUILD_VECTOR, G_BUILD_VECTOR_TRUNC and G_CONCAT_VECTOR opcodes.
2018-12-05 23:53:30 +00:00
AMDGPU
AMDGPU: Fix using old address spaces in some tests
2018-12-05 17:34:59 +00:00
ARC
…
ARM
[ARM GlobalISel] Implement call lowering for Thumb2
2018-12-05 10:35:28 +00:00
AVR
[AVR] Reorder the CHECK lines in directmem.ll to match current trunk
2018-11-09 23:17:59 +00:00
BPF
[bpf] Test case for symbol information in object file
2018-09-22 17:31:01 +00:00
Generic
Move llc-start-stop-instance to x86
2018-12-04 18:19:08 +00:00
Hexagon
[Hexagon] Add intrinsics for Hexagon V66
2018-12-05 21:14:51 +00:00
Inputs
…
Lanai
…
Mips
[TargetLowering] expandFP_TO_UINT - improve fp16 support
2018-11-19 19:16:13 +00:00
MIR
[CodeGen] Fix bugs in BranchFolderPass when debug labels are generated.
2018-11-30 08:07:29 +00:00
MSP430
[MSP430] Optimize srl/sra in case of A >> (8 + N)
2018-11-19 10:43:02 +00:00
Nios2
…
NVPTX
[NVPTX] Add lowering of i128 numbers as struct fields
2018-12-01 00:21:52 +00:00
PowerPC
[PowerPC] Make no-PIC default to match GCC - LLVM
2018-12-04 20:14:57 +00:00
RISCV
[RISCV] Remove RV64I SLLW/SRLW/SRAW patterns and add new test cases
2018-12-01 05:00:00 +00:00
SPARC
Relax fast register allocator related test cases; NFC
2018-10-29 20:10:42 +00:00
SystemZ
[SystemZ] make test immune to improvements in undef simplification
2018-11-18 16:50:44 +00:00
Thumb
[SelectionDAG] swap select_cc operands to enable folding
2018-11-09 11:09:40 +00:00
Thumb2
[ARM] Enable spilling of the hGPR register class in Thumb2
2018-11-08 13:02:10 +00:00
WebAssembly
[WebAssembly] WebAssemblyLowerEmscriptenEHSjLj: use getter/setter for accessing tempRet0
2018-11-20 19:25:07 +00:00
WinCFGuard
[COFF] Emit @feat.00 on 64-bit and set the CFG bit when emitting guardcf tables
2018-09-19 09:58:30 +00:00
WinEH
…
X86
Add objc.* ARC intrinsics and codegen them to their runtime methods.
2018-12-06 00:52:54 +00:00
XCore
Relax fast register allocator related test cases; NFC
2018-10-29 20:10:42 +00:00