Benjamin Maxwell 135ddf1e8e

[AArch64][SVE] Add basic support for @llvm.masked.compressstore (#168350) ...

This patch adds SVE support for the `masked.compressstore` intrinsic via
the existing `VECTOR_COMPRESS` lowering and compressing the store mask
via `VECREDUCE_ADD`.

Currently, only `nxv4[i32|f32]` and `nxv2[i64|f64]` are directly
supported, with other types promoted to these, where possible.

This is done in preparation for LV support of this intrinsic, which is
currently being worked on in #140723.

2025-11-28 10:17:36 +00:00

..

CMakeLists.txt

[SelectionDAG] Wire up -gen-sdnode-info TableGen backend (#125358)

2025-04-06 13:14:37 +03:00

DAGCombiner.cpp

[DAGCombiner] Don't optimize insert_vector_elt into shuffle if implicit truncation exists (#169022)

2025-11-22 03:33:53 +08:00

FastISel.cpp

CodeGen: Remove TRI argument from getRegClass (#158225)

2025-11-10 15:43:55 -08:00

FunctionLoweringInfo.cpp

[RemoveDIs][NFC] Remove dbg intrinsic handling code from SelectionDAG ISel (#144702)

2025-06-18 16:04:18 +01:00

InstrEmitter.cpp

Add IR and codegen support for deactivation symbols.

2025-11-26 12:37:09 -08:00

InstrEmitter.h

[SelectionDAG] Pass SDValue to InstrEmitter::EmitCopyFromReg. NFC (#153485)

2025-08-13 21:46:48 -07:00

LegalizeDAG.cpp

DAG: Move expandMultipleResultFPLibCall to TargetLowering (NFC) (#166988)

2025-11-12 03:50:33 +00:00

LegalizeFloatTypes.cpp

DAG: Move expandMultipleResultFPLibCall to TargetLowering (NFC) (#166988)

2025-11-12 03:50:33 +00:00

LegalizeIntegerTypes.cpp

[SDAG] Fix whitespace errors (NFC) (#168897)

2025-11-20 16:44:31 +00:00

LegalizeTypes.cpp

[SelectionDAG] Use getShiftAmountConstant. (#158395)

2025-09-12 19:49:48 -07:00

LegalizeTypes.h

[SelectionDAG][RISCV] Support STACK/PATCHPOINT in SoftenFloatOperand. (#165922)

2025-10-31 23:31:10 -07:00

LegalizeTypesGeneric.cpp

[SelectionDAG] Rename MemSDNode::getOriginalAlign to getBaseAlign. NFC (#139930)

2025-05-16 09:37:02 -07:00

LegalizeVectorOps.cpp

[SelectionDAG] Fix AArch64 machine verifier bug when expanding LOOP_DEPENDENCE_MASK (#168221)

2025-11-15 21:12:11 +00:00

LegalizeVectorTypes.cpp

[NVPTX] Lower LLVM masked vector loads and stores to PTX (#159387)

2025-11-25 10:26:15 -06:00

MatchContext.h

…

ResourcePriorityQueue.cpp

[llvm] Support building with c++23 (#154372)

2025-08-29 12:52:07 +00:00

ScheduleDAGFast.cpp

[CodeGen] Use range-based for loops (NFC) (#138488)

2025-05-05 10:08:49 -07:00

ScheduleDAGRRList.cpp

CodeGen: Remove TRI argument from getRegClass (#158225)

2025-11-10 15:43:55 -08:00

ScheduleDAGSDNodes.cpp

DAG: Remove TargetLowering::checkForPhysRegDependency (#161787)

2025-10-03 15:58:51 +00:00

ScheduleDAGSDNodes.h

…

ScheduleDAGVLIW.cpp

…

SDNodeDbgValue.h

[llvm] Use llvm::copy (NFC) (#137470)

2025-04-26 15:50:38 -07:00

SDNodeInfo.cpp

[SelectionDAG] Verify SDTCisVT and SDTCVecEltisVT constraints (#150125)

2025-11-16 18:26:03 +03:00

SelectionDAG.cpp

Add IR and codegen support for deactivation symbols.

2025-11-26 12:37:09 -08:00

SelectionDAGAddressAnalysis.cpp

[CodeGen] Remove handling for lifetime.start/end on non-alloca (#149838)

2025-07-22 09:44:59 +02:00

SelectionDAGBuilder.cpp

Add IR and codegen support for deactivation symbols.

2025-11-26 12:37:09 -08:00

SelectionDAGBuilder.h

DAG: Fix constructing a temporary TargetTransformInfo instance (#168480)

2025-11-20 01:19:23 -05:00

SelectionDAGDumper.cpp

Add llvm.vector.partial.reduce.fadd intrinsic (#159776)

2025-11-07 15:36:54 +00:00

SelectionDAGISel.cpp

Add IR and codegen support for deactivation symbols.

2025-11-26 12:37:09 -08:00

SelectionDAGPrinter.cpp

…

SelectionDAGTargetInfo.cpp

[SelectionDAG] Wire up -gen-sdnode-info TableGen backend (#125358)

2025-04-06 13:14:37 +03:00

StatepointLowering.cpp

[StatepointLowering] Use FrameIndex instead of TargetFrameIndex (#153555)

2025-08-15 08:02:31 +01:00

StatepointLowering.h

…

TargetLowering.cpp

[AArch64][SVE] Add basic support for @llvm.masked.compressstore (#168350)

2025-11-28 10:17:36 +00:00