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llvm-project/llvm/test/CodeGen
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Anton Afanasyev e175f99c49 Revert "[MachineCombiner][RISCV] Enable MachineCombiner for RISCV" 
This reverts commit 3112cf3b00fe45a0911ec0c2e6706ef1f8a9b972.
Test breakage: https://lab.llvm.org/buildbot/#/builders/16/builds/36631
2022-10-18 15:57:11 +03:00
..
AArch64
[AArch64] add test case for pattern ((X >> C) - Y) + Z; NFC
2022-10-18 19:18:23 +08:00
AMDGPU
[AMDGPU] Add regression test cases reported on D136042
2022-10-17 14:54:27 +01:00
ARC
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ARM
[ARM] Add additional targets to divide tests.
2022-10-17 16:51:17 +01:00
AVR
[AVR] Only push and clear R1 in interrupts when necessary
2022-08-15 14:29:38 +02:00
BPF
[BPF] Add (failing) testcase for Issue #57872
2022-10-16 18:16:18 +01:00
CSKY
[CSKY] Fix the btsti16 instruction missing in generic processor
2022-07-27 17:39:15 +08:00
DirectX
[HLSL] CodeGen hlsl resource binding.
2022-10-17 14:29:19 -07:00
Generic
[VP] Add IR expansion for vp.icmp and vp.fcmp
2022-10-05 08:07:39 +01:00
Hexagon
[Hexagon] Recognize idioms for fixed-point vector multiplication
2022-10-14 15:22:25 -07:00
Inputs
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Lanai
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LoongArch
[LoongArch] Fix codegen of atomicrmw nand
2022-10-18 20:39:20 +08:00
M68k
[M68k] Fix the crash of fast register allocator
2022-09-15 09:24:22 +08:00
Mips
[CodeGen] Using ZExt for extractelement indices.
2022-10-15 15:45:35 -07:00
MIR
MachineVerifier: Verify REG_SEQUENCE
2022-09-22 09:51:15 -04:00
MLRegalloc
UPdate reference-log-noml.txt as well to adapt for D133902
2022-09-30 18:03:28 -07:00
MSP430
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NVPTX
[NVPTX] Support neg{.ftz} for f16 and f16x2
2022-10-13 10:48:33 -07:00
PowerPC
[CodeGen] Using ZExt for extractelement indices.
2022-10-15 15:45:35 -07:00
RISCV
Revert "[MachineCombiner][RISCV] Enable MachineCombiner for RISCV"
2022-10-18 15:57:11 +03:00
SPARC
[SPARC] Make calls to function with big return values work
2022-10-18 00:01:55 +00:00
SPIRV
[SPIRV] Fix formatting of function tests
2022-10-14 01:55:27 +02:00
SystemZ
[SystemZ] Revert migration of SystemZ/Large/branch-01.ll
2022-10-12 14:24:04 +00:00
Thumb
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Thumb2
Propagate tied operands when copying a MachineInstr.
2022-10-13 09:40:35 +01:00
VE
[CodeGen] Using ZExt for extractelement indices.
2022-10-15 15:45:35 -07:00
WebAssembly
[CodeGen] Using ZExt for extractelement indices.
2022-10-15 15:45:35 -07:00
WinCFGuard
[llvm] Mark CFGuard fn ptr symbol as DSO local and add tests for mingw
2022-08-23 23:39:39 +03:00
WinEH
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X86
[X86] Lower vector interleave into unpck and perm
2022-10-17 11:39:27 -07:00
XCore
Fix CSR update check
2022-08-24 18:09:49 -07:00