e44fd05035
Unifies the two dialects that define x86 operations into a single one. The AMX dialect is moved into X86 in line with other x86 extensions. Following the dialect renaming, X86 dialect is now a suitable home for wider range of operations targeting specific hardware features. Moving AMX definitions to X86 dialect creates a single, centralized hub for defining all x86 intrinsic-like operations. The new grouping aims to eliminate the need for new dialects as new hardware extensions become available. The two dialects are simply merged together. X86 dialect refactoring will be addressed separately. List of changes: - operations: 'amx.tile_*' => 'x86.amx.tile_*' - types: '!amx.tile' => '!x86.amx.tile' - namespace: 'mlir::amx' => 'mlir::x86::amx' - test define: 'MLIR_RUN_AMX_TESTS' => 'MLIR_RUN_X86_AMX_TESTS' - vector lowering: AMX is enabled by default together with X86 The MLIR AMX tests are now nested under X86 directory. To enable AMX integration tests, 'MLIR_RUN_X86_TESTS' must also be defined.
30 lines
1.5 KiB
MLIR
30 lines
1.5 KiB
MLIR
// Ensure that ConvertVectorToLLVMPass options remain serialisable.
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// This test also allows us to exercise these options (to some extent) even if we
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// don't use them in other Vector to LLVM conversion tests. This is quite relevant
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// for the `Vector` Dialect (and `--convert-vector-to-llvm` pass) as in many cases
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// we use the Transform Dialect (TD) rather than `--convert-vector-to-llvm` for
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// testing. So here we don't check the correctness of the passes, as they're
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// covered by other tests that use TD, but we still provide some test coverage of
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// these pass options.
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// We don't need to actually parse any IR to print the pass options. We just need
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// to provide --dump-pass-pipeline
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// RUN: mlir-opt --convert-vector-to-llvm --dump-pass-pipeline %s 2>&1 | FileCheck %s --check-prefix=DEFAULT
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// RUN: mlir-opt --convert-vector-to-llvm='vector-contract-lowering=llvmintr vector-transpose-lowering=llvmintr' \
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// RUN: --dump-pass-pipeline %s 2>&1 | FileCheck %s --check-prefix=NON-DEFAULT
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// CHECK: builtin.module(
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// CHECK-SAME: convert-vector-to-llvm{
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// CHECK-SAME: enable-arm-neon={{[aA-zZ0-9]+}}
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// CHECK-SAME: enable-arm-sve={{[aA-zZ0-9]+}}
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// CHECK-SAME: enable-x86={{[aA-zZ0-9]+}}
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// CHECK-SAME: force-32bit-vector-indices={{[aA-zZ0-9]+}}
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// CHECK-SAME: reassociate-fp-reductions={{[aA-zZ0-9]+}}
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// DEFAULT: vector-contract-lowering=dot
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// DEFAULT: vector-transpose-lowering=eltwise
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// NON-DEFAULT: vector-contract-lowering=llvm
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// NON-DEFAULT: vector-transpose-lowering=llvm
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