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llvm-project/llvm/test/CodeGen
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Phoebe Wang e49fcfc7cd [X86][ABI] Change the alignment of f80 in 32-bit calling convention to meet with different data layout 
Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D113739
2021-11-13 10:00:34 +08:00
..
AArch64
[AArch64][x86] add tests for swapped cmp+vselect patterns; NFC
2021-11-12 15:49:46 -05:00
AMDGPU
[AMDGPU] Regenerate udiv.ll tests
2021-11-12 17:57:40 +00:00
ARC
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ARM
[ARM] implement support for TLS register based stack protector
2021-11-09 18:19:47 +01:00
AVR
[TwoAddressInstructionPass] Improve the SrcRegMap and DstRegMap computation
2021-10-11 15:28:31 -07:00
BPF
BPF: change btf_type_tag BTF output format
2021-11-09 11:34:25 -08:00
CSKY
[CSKY] First patch to construct codegen infra and generate first add instruction
2021-11-01 10:06:56 +08:00
Generic
[AIX] XFAIL 2009-03-29-SoftFloatVectorExtract.ll because of no soft float support
2021-11-10 20:58:26 -05:00
Hexagon
[LiveIntervals] Update subranges in processTiedPairs
2021-11-11 12:24:59 +00:00
Inputs
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Lanai
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M68k
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Mips
[SelectionDAG] Optimize expansion for rotates/funnel shifts
2021-11-02 11:38:25 +00:00
MIR
[X86] Update RET/LRET instruction to use the same naming convention as IRET (PR36876). NFC
2021-11-07 15:06:54 +00:00
MSP430
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NVPTX
[NVPTX] Add imm variants for surface and texture instructions
2021-11-10 19:05:03 +03:00
PowerPC
[PowerPC] PPC backend optimization to lower int_ppc_tdw/int_ppc_tw intrinsics to TDI/TWI machine instructions
2021-11-11 09:52:00 -06:00
RISCV
[RISCV] Fixed duplicate RUN line on float-intrinsics.ll. NFC
2021-11-12 16:27:36 -08:00
SPARC
[SparcISelLowering] avoid emitting libcalls to __muloti4 and __mulodi4
2021-10-29 13:14:09 -07:00
SystemZ
[SystemZ] Improvement of emitMemMemWrapper()
2021-10-26 17:03:01 +02:00
Thumb
[TwoAddressInstructionPass] Update existing physreg live intervals
2021-11-05 21:20:30 +00:00
Thumb2
[DAG] reassociateOpsCommutative - peek through bitcasts to find constants
2021-11-11 12:00:22 +00:00
VE
[VE][NFC] correct bitmasking in popcnt expansion test
2021-10-25 13:55:58 +02:00
WebAssembly
[WebAssembly] Add prototype relaxed float to int trunc instructions
2021-10-28 14:01:53 -07:00
WinCFGuard
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WinEH
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X86
[X86][ABI] Change the alignment of f80 in 32-bit calling convention to meet with different data layout
2021-11-13 10:00:34 +08:00
XCore
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