Igor Breger 45ef10f110 AVX512F: Add GATHER/SCATTER assembler Intel syntax tests for knl/skx/avx . Change memory operand parser handling. ...

Differential Revision: http://reviews.llvm.org/D17564

llvm-svn: 261862

2016-02-25 13:30:17 +00:00

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avx-512.txt

[AVX-512] Fix test case update missed in r257299.

2016-01-11 00:56:48 +00:00

fp-stack.txt

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hex-immediates.txt

llvm-mc: Add option for prefering hex format disassembly.

2014-06-11 20:26:40 +00:00

intel-syntax-32.txt

[X86] Don't print 'dword ptr' or 'qword ptr' on the operand to some of the LEA variants in Intel syntax. The memory operand is inherently unsized.

2015-01-08 07:41:30 +00:00

intel-syntax.txt

AVX512F: Add GATHER/SCATTER assembler Intel syntax tests for knl/skx/avx . Change memory operand parser handling.

2016-02-25 13:30:17 +00:00

invalid-VEX-vvvv.txt

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lit.local.cfg

Reduce verbiage of lit.local.cfg files

2014-06-09 22:42:55 +00:00

marked-up.txt

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missing-sib.txt

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moffs.txt

[X86] Make the instructions that use AdSize16/32/64 co-exist together without using mode predicates.

2015-01-02 07:02:25 +00:00

padlock.txt

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prefixes.txt

[X86] Disassembler support for move to/from %rax with a 32-bit memory offset is REX.W and AdSize prefix are both present.

2015-01-03 00:00:20 +00:00

simple-tests.txt

[X86] Add some missing reversed forms of XOP instructions.

2016-02-20 06:20:17 +00:00

truncated-input.txt

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x86-16.txt

[X86]: Correctly sign-extend 16-bit immediate in CALL instruction.

2015-06-26 16:58:59 +00:00

x86-32.txt

[X86]: Correctly sign-extend 16-bit immediate in CALL instruction.

2015-06-26 16:58:59 +00:00

x86-64.txt

[llvm-mc] Ignore opcode size prefix in 64-bit CALL disassembly

2015-08-26 16:20:29 +00:00