
RegionBranchOpInterface and BranchOpInterface are allowed to make implicit type conversions along control-flow edges. In effect, this adds an interface method, `areTypesCompatible`, to both interfaces, which should return whether the types of corresponding successor operands and block arguments are compatible. Users of the interfaces, here on forth, must be aware that types may mismatch, although current users (in MLIR core), are not affected by this change. By default, type equality is used. `async.execute` already has unequal types along control-flow edges (`!async.value<f32>` vs. `f32`), but it opted out of calling `RegionBranchOpInterface::verifyTypes` in its verifier. That method has now been removed and `RegionBranchOpInterface` will verify types along control edges by default in its verifier. Reviewed By: rriddle Differential Revision: https://reviews.llvm.org/D120790
145 lines
4.9 KiB
C++
145 lines
4.9 KiB
C++
//===- ControlFlowInterfacesTest.cpp - Unit Tests for Control Flow Interf. ===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "mlir/Interfaces/ControlFlowInterfaces.h"
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#include "mlir/IR/BuiltinOps.h"
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#include "mlir/IR/Dialect.h"
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#include "mlir/IR/DialectImplementation.h"
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#include "mlir/IR/OpDefinition.h"
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#include "mlir/IR/OpImplementation.h"
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#include "mlir/Parser.h"
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#include <gtest/gtest.h>
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using namespace mlir;
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/// A dummy op that is also a terminator.
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struct DummyOp : public Op<DummyOp, OpTrait::IsTerminator> {
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using Op::Op;
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static ArrayRef<StringRef> getAttributeNames() { return {}; }
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static StringRef getOperationName() { return "cftest.dummy_op"; }
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};
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/// All regions of this op are mutually exclusive.
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struct MutuallyExclusiveRegionsOp
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: public Op<MutuallyExclusiveRegionsOp, RegionBranchOpInterface::Trait> {
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using Op::Op;
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static ArrayRef<StringRef> getAttributeNames() { return {}; }
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static StringRef getOperationName() {
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return "cftest.mutually_exclusive_regions_op";
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}
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// Regions have no successors.
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void getSuccessorRegions(Optional<unsigned> index,
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ArrayRef<Attribute> operands,
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SmallVectorImpl<RegionSuccessor> ®ions) {}
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};
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/// Regions are executed sequentially.
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struct SequentialRegionsOp
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: public Op<SequentialRegionsOp, RegionBranchOpInterface::Trait> {
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using Op::Op;
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static ArrayRef<StringRef> getAttributeNames() { return {}; }
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static StringRef getOperationName() { return "cftest.sequential_regions_op"; }
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// Region 0 has Region 1 as a successor.
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void getSuccessorRegions(Optional<unsigned> index,
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ArrayRef<Attribute> operands,
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SmallVectorImpl<RegionSuccessor> ®ions) {
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if (index == 0u) {
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Operation *thisOp = this->getOperation();
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regions.push_back(RegionSuccessor(&thisOp->getRegion(1)));
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}
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}
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};
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/// A dialect putting all the above together.
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struct CFTestDialect : Dialect {
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explicit CFTestDialect(MLIRContext *ctx)
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: Dialect(getDialectNamespace(), ctx, TypeID::get<CFTestDialect>()) {
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addOperations<DummyOp, MutuallyExclusiveRegionsOp, SequentialRegionsOp>();
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}
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static StringRef getDialectNamespace() { return "cftest"; }
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};
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TEST(RegionBranchOpInterface, MutuallyExclusiveOps) {
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const char *ir = R"MLIR(
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"cftest.mutually_exclusive_regions_op"() (
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{"cftest.dummy_op"() : () -> ()}, // op1
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{"cftest.dummy_op"() : () -> ()} // op2
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) : () -> ()
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)MLIR";
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DialectRegistry registry;
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registry.insert<CFTestDialect>();
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MLIRContext ctx(registry);
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OwningOpRef<ModuleOp> module = parseSourceString(ir, &ctx);
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Operation *testOp = &module->getBody()->getOperations().front();
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Operation *op1 = &testOp->getRegion(0).front().front();
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Operation *op2 = &testOp->getRegion(1).front().front();
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EXPECT_TRUE(insideMutuallyExclusiveRegions(op1, op2));
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EXPECT_TRUE(insideMutuallyExclusiveRegions(op2, op1));
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}
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TEST(RegionBranchOpInterface, NotMutuallyExclusiveOps) {
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const char *ir = R"MLIR(
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"cftest.sequential_regions_op"() (
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{"cftest.dummy_op"() : () -> ()}, // op1
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{"cftest.dummy_op"() : () -> ()} // op2
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) : () -> ()
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)MLIR";
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DialectRegistry registry;
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registry.insert<CFTestDialect>();
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MLIRContext ctx(registry);
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OwningOpRef<ModuleOp> module = parseSourceString(ir, &ctx);
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Operation *testOp = &module->getBody()->getOperations().front();
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Operation *op1 = &testOp->getRegion(0).front().front();
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Operation *op2 = &testOp->getRegion(1).front().front();
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EXPECT_FALSE(insideMutuallyExclusiveRegions(op1, op2));
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EXPECT_FALSE(insideMutuallyExclusiveRegions(op2, op1));
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}
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TEST(RegionBranchOpInterface, NestedMutuallyExclusiveOps) {
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const char *ir = R"MLIR(
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"cftest.mutually_exclusive_regions_op"() (
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{
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"cftest.sequential_regions_op"() (
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{"cftest.dummy_op"() : () -> ()}, // op1
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{"cftest.dummy_op"() : () -> ()} // op3
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) : () -> ()
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"cftest.dummy_op"() : () -> ()
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},
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{"cftest.dummy_op"() : () -> ()} // op2
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) : () -> ()
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)MLIR";
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DialectRegistry registry;
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registry.insert<CFTestDialect>();
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MLIRContext ctx(registry);
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OwningOpRef<ModuleOp> module = parseSourceString(ir, &ctx);
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Operation *testOp = &module->getBody()->getOperations().front();
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Operation *op1 =
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&testOp->getRegion(0).front().front().getRegion(0).front().front();
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Operation *op2 = &testOp->getRegion(1).front().front();
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Operation *op3 =
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&testOp->getRegion(0).front().front().getRegion(1).front().front();
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EXPECT_TRUE(insideMutuallyExclusiveRegions(op1, op2));
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EXPECT_TRUE(insideMutuallyExclusiveRegions(op3, op2));
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EXPECT_FALSE(insideMutuallyExclusiveRegions(op1, op3));
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}
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