Shilei Tian e7dec231fe

[ReplaceConstant] Don't create instructions for the same constant multiple times in the same basic block (#169141) ...

Fixes #167500.

2025-11-26 22:44:40 -05:00

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AArch64

Add deactivation symbol operand to ConstantPtrAuth.

2025-11-26 12:39:40 -08:00

AMDGPU

[ReplaceConstant] Don't create instructions for the same constant multiple times in the same basic block (#169141)

2025-11-26 22:44:40 -05:00

ARC

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ARM

[DAG] Add strictfp implicit def reg after metadata. (#168282)

2025-11-17 10:57:21 +00:00

AVR

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BPF

[BPF] Allow libcalls behind a feature gate (#168442)

2025-11-24 09:02:50 -08:00

CSKY

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DirectX

[DirectX] Simplify DXIL data scalarization, and data scalarize whole GEP chains (#168096)

2025-11-24 10:56:20 -08:00

Generic

[IR] llvm.reloc.none intrinsic for no-op symbol references (#147427)

2025-11-06 08:52:46 -08:00

Hexagon

Reland "[RegAlloc] Fix the terminal rule check for interfere with DstReg (#168661)" (#169219)

2025-11-24 09:27:25 +08:00

Inputs

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Lanai

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LoongArch

Revert "Reland "RegisterCoalescer: Add implicit-def of super register when coalescing SUBREG_TO_REG""

2025-11-25 11:01:27 +00:00

M68k

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Mips

[Mips] Set custom lowering for STRICT_FSETCC/STRICT_FSETCCS ops. (#168303)

2025-11-25 00:02:37 -05:00

MIR

Add IR and codegen support for deactivation symbols.

2025-11-26 12:37:09 -08:00

MIR2Vec

[AArch64][GlobalISel] Added support for hadd family of intrinsics (#163985)

2025-11-19 15:44:02 +00:00

MLRegAlloc

[MLGO] Remove Extra Dev Mode Features (#167273)

2025-11-10 08:40:28 -08:00

MSP430

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NVPTX

[NVPTX] Fix lit test issues from masked load/store implementation (#169535)

2025-11-25 12:27:31 -06:00

PowerPC

[PowerPC ]convert (setcc (and X, 1), 0, eq) to XORI (and X, 1), 1 (#168384)

2025-11-25 13:16:39 -05:00

RISCV

[RISCV] Remove intrinsic declarations in tests, NFC (#167474)

2025-11-26 17:25:07 +08:00

SPARC

[Sparc] Optimize compare instruction (#167140)

2025-11-14 23:11:38 +07:00

SPIRV

[SPIRV] Use OpCopyMemory for logical SPIRV memcpy (#169348)

2025-11-26 10:11:46 -05:00

SystemZ

[SystemZ] Emit optional argument area length field (#169679)

2025-11-26 16:16:13 -05:00

Thumb

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Thumb2

[ARM] Introduce intrinsics for MVE add/sub/mul under strict-fp. (#169156)

2025-11-25 07:29:55 +00:00

VE

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WebAssembly

Reland "[RegAlloc] Fix the terminal rule check for interfere with DstReg (#168661)" (#169219)

2025-11-24 09:27:25 +08:00

WinCFGuard

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WinEH

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X86

[X86] addcarry.ll - add test coverage for #169691 (#169716)

2025-11-26 20:14:12 +00:00

XCore

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Xtensa

[Xtensa] Fix S32C1I instruction encoding and copyPhysReg. (#165174)

2025-11-05 20:27:11 +03:00