e8245d5324
addr matching was the only gatekeeper for starting selecting G_LOAD and G_STORE using SDAG patterns. * Introduce a complex renderer gi_addr for addr. In this patch only the existing functionality has been implemented. The renderer's name is the same as in SDAG: selectAddr. Apparently the type of GIComplexOperandMatcher doesn't matter as RISCV also uses s32 for both 64 and 32 bit pointers. * X86SelectAddress now is used for both: pattern matching and manual selection. As a result it accumulates all the code that previously was distributed among different selection functions. * Replace getLoadStoreOp with getPtrLoadStoreOp in Load/Store selector as GlobalISel matcher or emitter can't map the pointer type into i32/i64 types used in SDAG patterns for pointers. So the load and store selection of pointers is still manual. getLoadStoreOp is still present because it is used in G_FCONSTANT lowering that requires extra efforts to select it using SDAG patterns. * Since truncating stores are not supported, we custom legalize them by matching types of store and MMO. * Introduce a constant pool flag in X86AddressMode because otherwise we need to introduce a GlobalISel copy for X86ISelAddressMode. * Also please notice in the tests that GlobalISel prefers to fold memory operands immediately comparing to SDAG. The reason is that GlobalISel doesn't have target hooks in GIM_CheckIsSafeToFold. Or maybe another check on profitability is required along with safety check that is currently not present.
117 lines
3.9 KiB
LLVM
117 lines
3.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -global-isel=0 -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64
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; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64
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; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64
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; RUN: llc < %s -global-isel=0 -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,DAG-X86
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; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,DAG-X86
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; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,GISEL-X86
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define i8 @test_udiv_i8(i8 %arg1, i8 %arg2) nounwind {
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; X64-LABEL: test_udiv_i8:
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; X64: # %bb.0:
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; X64-NEXT: movzbl %dil, %eax
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; X64-NEXT: divb %sil
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; X64-NEXT: retq
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;
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; DAG-X86-LABEL: test_udiv_i8:
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; DAG-X86: # %bb.0:
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; DAG-X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
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; DAG-X86-NEXT: divb {{[0-9]+}}(%esp)
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; DAG-X86-NEXT: retl
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;
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; GISEL-X86-LABEL: test_udiv_i8:
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; GISEL-X86: # %bb.0:
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; GISEL-X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
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; GISEL-X86-NEXT: movzbl %al, %eax
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; GISEL-X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
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; GISEL-X86-NEXT: divb %cl
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; GISEL-X86-NEXT: retl
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%ret = udiv i8 %arg1, %arg2
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ret i8 %ret
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}
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define i16 @test_udiv_i16(i16 %arg1, i16 %arg2) nounwind {
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; X64-LABEL: test_udiv_i16:
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; X64: # %bb.0:
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: # kill: def $ax killed $ax killed $eax
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; X64-NEXT: xorl %edx, %edx
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; X64-NEXT: divw %si
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; X64-NEXT: retq
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;
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; DAG-X86-LABEL: test_udiv_i16:
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; DAG-X86: # %bb.0:
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; DAG-X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; DAG-X86-NEXT: xorl %edx, %edx
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; DAG-X86-NEXT: divw {{[0-9]+}}(%esp)
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; DAG-X86-NEXT: retl
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;
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; GISEL-X86-LABEL: test_udiv_i16:
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; GISEL-X86: # %bb.0:
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; GISEL-X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; GISEL-X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
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; GISEL-X86-NEXT: # kill: def $ax killed $ax killed $eax
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; GISEL-X86-NEXT: xorl %edx, %edx
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; GISEL-X86-NEXT: divw %cx
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; GISEL-X86-NEXT: retl
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%ret = udiv i16 %arg1, %arg2
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ret i16 %ret
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}
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define i32 @test_udiv_i32(i32 %arg1, i32 %arg2) nounwind {
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; X64-LABEL: test_udiv_i32:
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; X64: # %bb.0:
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: xorl %edx, %edx
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; X64-NEXT: divl %esi
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; X64-NEXT: retq
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;
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; X86-LABEL: test_udiv_i32:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: xorl %edx, %edx
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; X86-NEXT: divl {{[0-9]+}}(%esp)
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; X86-NEXT: retl
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%ret = udiv i32 %arg1, %arg2
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ret i32 %ret
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}
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define i64 @test_udiv_i64(i64 %arg1, i64 %arg2) nounwind {
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; X64-LABEL: test_udiv_i64:
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; X64: # %bb.0:
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; X64-NEXT: movq %rdi, %rax
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; X64-NEXT: xorl %edx, %edx
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; X64-NEXT: divq %rsi
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; X64-NEXT: retq
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;
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; DAG-X86-LABEL: test_udiv_i64:
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; DAG-X86: # %bb.0:
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; DAG-X86-NEXT: subl $12, %esp
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; DAG-X86-NEXT: pushl {{[0-9]+}}(%esp)
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; DAG-X86-NEXT: pushl {{[0-9]+}}(%esp)
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; DAG-X86-NEXT: pushl {{[0-9]+}}(%esp)
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; DAG-X86-NEXT: pushl {{[0-9]+}}(%esp)
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; DAG-X86-NEXT: calll __udivdi3
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; DAG-X86-NEXT: addl $28, %esp
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; DAG-X86-NEXT: retl
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;
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; GISEL-X86-LABEL: test_udiv_i64:
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; GISEL-X86: # %bb.0:
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; GISEL-X86-NEXT: pushl %esi
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; GISEL-X86-NEXT: subl $24, %esp
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; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; GISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %esi
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; GISEL-X86-NEXT: movl %eax, (%esp)
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; GISEL-X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
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; GISEL-X86-NEXT: movl %edx, {{[0-9]+}}(%esp)
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; GISEL-X86-NEXT: movl %esi, {{[0-9]+}}(%esp)
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; GISEL-X86-NEXT: calll __udivdi3
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; GISEL-X86-NEXT: addl $24, %esp
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; GISEL-X86-NEXT: popl %esi
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; GISEL-X86-NEXT: retl
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%ret = udiv i64 %arg1, %arg2
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ret i64 %ret
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}
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