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This patch adds initial support for Integrated Distributed ThinLTO (DTLTO) in LLVM, which manages distribution internally during the traditional link step. This enables compatibility with any build system that supports in-process ThinLTO. In contrast, existing approaches to distributed ThinLTO, which split the thin-link (--thinlto-index-only), backend compilation, and final link into separate steps, require build system support, e.g. Bazel. This patch implements the core DTLTO mechanism, which enables delegation of ThinLTO backend jobs to an external process (the distributor). The distributor can then manage job distribution through systems like Incredibuild. A generic JSON interface is used to communicate with the distributor, allowing for the creation of new distributors (and thus integration with different distribution systems) without modifying LLVM. Please see llvm/docs/dtlto.rst for more details. RFC: https://discourse.llvm.org/t/rfc-integrated-distributed-thinlto/69641 Design Review: https://github.com/llvm/llvm-project/pull/126654
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User Guides
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===========
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NOTE: If you are a user who is only interested in using an LLVM-based compiler,
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you should look into `Clang <https://clang.llvm.org>`_ instead. The
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documentation here is intended for users who have a need to work with the
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intermediate LLVM representation.
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.. contents::
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:local:
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.. toctree::
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:hidden:
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AArch64SME
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AddingConstrainedIntrinsics
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AdvancedBuilds
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AliasAnalysis
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AMDGPUUsage
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Benchmarking
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BigEndianNEON
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BuildingADistribution
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CFIVerify
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CMake
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CMakePrimer
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CodeGenerator
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CodeOfConduct
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CommandLine
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CompileCudaWithLLVM
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CoverageMappingFormat
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CycleTerminology
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DebuggingJITedCode
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DirectXUsage
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Docker
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DTLTO
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FatLTO
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ExtendingLLVM
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GitHub
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GoldPlugin
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GlobalISel/MIRPatterns
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HowToBuildOnARM
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HowToBuildWithPGO
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HowToBuildWindowsItaniumPrograms
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HowToCrossCompileBuiltinsOnArm
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HowToCrossCompileLLVM
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HowToUpdateDebugInfo
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InstCombineContributorGuide
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InstrProfileFormat
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InstrRefDebugInfo
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LinkTimeOptimization
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LoopTerminology
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MarkdownQuickstartTemplate
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MemorySSA
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MergeFunctions
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MCJITDesignAndImplementation
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MisExpect
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ORCv2
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OpaquePointers
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JITLink
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NewPassManager
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NVPTXUsage
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Passes
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ReportingGuide
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ResponseGuide
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Remarks
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RemoveDIsDebugInfo
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RISCVUsage
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RISCV/RISCVVectorExtension
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SourceLevelDebugging
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SPIRVUsage
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SandboxIR
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StackSafetyAnalysis
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SupportLibrary
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TableGen/index
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TableGenFundamentals
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Telemetry
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Vectorizers
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WritingAnLLVMPass
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WritingAnLLVMNewPMPass
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WritingAnLLVMBackend
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yaml2obj
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Clang
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-----
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:doc:`HowToBuildOnARM`
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Notes on building and testing LLVM/Clang on ARM.
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:doc:`HowToBuildWithPGO`
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Notes on building LLVM/Clang with PGO.
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:doc:`HowToCrossCompileLLVM`
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Notes on cross-building and testing LLVM/Clang.
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`How to build the C, C++, ObjC, and ObjC++ front end`__
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Instructions for building the clang front-end from source.
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.. __: https://clang.llvm.org/get_started.html
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:doc:`CoverageMappingFormat`
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This describes the format and encoding used for LLVM’s code coverage mapping.
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:doc:`CFIVerify`
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A description of the verification tool for Control Flow Integrity.
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LLVM Builds and Distributions
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-----------------------------
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:doc:`BuildingADistribution`
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A best-practices guide for using LLVM's CMake build system to package and
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distribute LLVM-based tools.
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:doc:`CMake`
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An addendum to the main Getting Started guide for those using the `CMake
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build system <http://www.cmake.org>`_.
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:doc:`Docker`
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A reference for using Dockerfiles provided with LLVM.
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:doc:`Support Library <SupportLibrary>`
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This document describes the LLVM Support Library (``lib/Support``) and
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how to keep LLVM source code portable.
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:doc:`AdvancedBuilds`
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This document describes more advanced build configurations.
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Optimizations
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-------------
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:doc:`WritingAnLLVMNewPMPass`
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Information on how to write LLVM transformations under the new pass
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manager.
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:doc:`WritingAnLLVMPass`
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Information on how to write LLVM transformations and analyses under the
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legacy pass manager.
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:doc:`Passes`
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A list of optimizations and analyses implemented in LLVM.
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:doc:`StackSafetyAnalysis`
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This document describes the design of the stack safety analysis of local
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variables.
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:doc:`MergeFunctions`
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Describes functions merging optimization.
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:doc:`AliasAnalysis`
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Information on how to write a new alias analysis implementation or how to
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use existing analyses.
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:doc:`MemorySSA`
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Information about the MemorySSA utility in LLVM, as well as how to use it.
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:doc:`LoopTerminology`
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A document describing Loops and associated terms as used in LLVM.
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:doc:`CycleTerminology`
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A document describing cycles as a generalization of loops.
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:doc:`Vectorizers`
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This document describes the current status of vectorization in LLVM.
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:doc:`LinkTimeOptimization`
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This document describes the interface between LLVM intermodular optimizer
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and the linker and its design
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:doc:`DTLTO`
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This document describes the DTLTO implementation, which allows for
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distributing ThinLTO backend compilations without requiring support from
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the build system.
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:doc:`GoldPlugin`
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How to build your programs with link-time optimization on Linux.
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:doc:`Remarks`
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A reference on the implementation of remarks in LLVM.
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:doc:`Source Level Debugging with LLVM <SourceLevelDebugging>`
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This document describes the design and philosophy behind the LLVM
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source-level debugger.
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:doc:`How to Update Debug Info <HowToUpdateDebugInfo>`
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This document specifies how to correctly update debug info in various kinds
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of code transformations.
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:doc:`InstrRefDebugInfo`
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This document explains how LLVM uses value tracking, or instruction
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referencing, to determine variable locations for debug info in the final
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stages of compilation.
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:doc:`RemoveDIsDebugInfo`
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This is a migration guide describing how to move from debug info using
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intrinsics such as dbg.value to using the non-instruction DbgRecord object.
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:doc:`InstrProfileFormat`
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This document explains two binary formats of instrumentation-based profiles.
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:doc:`InstCombineContributorGuide`
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This document specifies guidelines for contributions for InstCombine and
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related passes.
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Code Generation
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---------------
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:doc:`WritingAnLLVMBackend`
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Information on how to write LLVM backends for machine targets.
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:doc:`CodeGenerator`
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The design and implementation of the LLVM code generator. Useful if you are
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working on retargetting LLVM to a new architecture, designing a new codegen
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pass, or enhancing existing components.
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:doc:`TableGen <TableGen/index>`
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Describes the TableGen tool, which is used heavily by the LLVM code
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generator.
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==========
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GlobalISel
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==========
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:doc:`MIRPatterns <GlobalISel/MIRPatterns>`
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Describes the design of MIR Patterns and how to use them.
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===
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JIT
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===
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:doc:`MCJITDesignAndImplementation`
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Describes the inner workings of MCJIT execution engine.
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:doc:`ORCv2`
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Describes the design and implementation of the ORC APIs, including some
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usage examples, and a guide for users transitioning from ORCv1 to ORCv2.
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:doc:`JITLink`
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Describes the design and APIs for the JITLink library, ORC's new JIT
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linker.
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:doc:`DebuggingJITedCode`
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How to debug JITed code with GDB.
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Additional Topics
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-----------------
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:doc:`CommandLine`
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Provides information on using the command line parsing library.
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:doc:`ExtendingLLVM`
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Look here to see how to add instructions and intrinsics to LLVM.
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:doc:`AddingConstrainedIntrinsics`
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Gives the steps necessary when adding a new constrained math intrinsic
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to LLVM.
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:doc:`HowToBuildWindowsItaniumPrograms`
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Notes on assembling a Windows Itanium environment.
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:doc:`HowToCrossCompileBuiltinsOnArm`
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Notes on cross-building and testing the compiler-rt builtins for Arm.
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:doc:`BigEndianNEON`
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LLVM's support for generating NEON instructions on big endian ARM targets is
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somewhat nonintuitive. This document explains the implementation and rationale.
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:doc:`AArch64SME`
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LLVM's support for AArch64 SME ACLE and ABI.
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:doc:`CompileCudaWithLLVM`
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LLVM support for CUDA.
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:doc:`NVPTXUsage`
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This document describes using the NVPTX backend to compile GPU kernels.
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:doc:`AMDGPUUsage`
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This document describes using the AMDGPU backend to compile GPU kernels.
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:doc:`AMDGPUDwarfExtensionsForHeterogeneousDebugging`
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This document describes DWARF extensions to support heterogeneous debugging
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for targets such as the AMDGPU backend.
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:doc:`AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack`
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This document describes a DWARF extension to allow location descriptions on
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the DWARF expression stack. It is part of
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:doc:`AMDGPUDwarfExtensionsForHeterogeneousDebugging`.
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:doc:`SPIRVUsage`
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This document describes using the SPIR-V target to compile GPU kernels.
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:doc:`DirectXUsage`
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This document describes using the DirectX target to compile GPU code for the
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DirectX runtime.
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:doc:`RISCVUsage`
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This document describes using the RISC-V target.
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:doc:`RISCV/RISCVVectorExtension`
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This document describes how the RISC-V Vector extension can be expressed in LLVM IR and how code is generated for it in the backend.
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:doc:`Sandbox IR <SandboxIR>`
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This document describes the design and usage of Sandbox IR, a transactional layer over LLVM IR.
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:doc:`Telemetry`
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This document describes the Telemetry framework in LLVM.
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