Fateme Hosseini bb12c43573
[Hexagon] Add HVX patterns for vector arithmetic (#170704)
This patch Introduces instruction selection patterns to generate the
vsub, vadd, vmpy, vmin, and vmax HVX vector instructions. These patterns
match on standard IR-level vector operations and lower them to the
corresponding Hexagon HVX intrinsics.

Patch By: Fateme Hosseini

Co-authored-by: Jyotsna Verma <jverma@qti.qualcomm.com>
2025-12-11 16:44:01 -06:00
..
2025-10-20 15:59:03 -05:00
2025-10-20 15:59:03 -05:00