
This attempts to standardize and extend some of the insert vector element lowering. Most notably: - More types are handled by splitting illegal vectors. - The index type for G_INSERT_VECTOR_ELT is canonicalized to TLI.getVectorIdxTy(), similar to extact_vector_element. - Some of the existing patterns now have the index type specified to make sure they can apply to GISel too. - The C++ selection code has been removed, relying on tablegen patterns. - G_INSERT_VECTOR_ELT with small GPR input elements are pre-selected to use a i32 type, allowing the existing patterns to apply. - Variable index inserts are lowered in post-legalizer lowering, expanding into a stack store and reload.
43 lines
1.8 KiB
YAML
43 lines
1.8 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn -run-pass=amdgpu-prelegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s
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# Tries to emit a foldable G_PTR_ADD with (p1, s32) operands.
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---
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name: test_ptradd_crash__offset_smaller
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tracksRegLiveness: true
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body: |
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bb.0:
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; CHECK-LABEL: name: test_ptradd_crash__offset_smaller
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; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 12
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; CHECK-NEXT: [[INTTOPTR:%[0-9]+]]:_(p1) = G_INTTOPTR [[C]](s64)
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; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[INTTOPTR]](p1) :: (load (s32), addrspace 1)
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; CHECK-NEXT: $sgpr0 = COPY [[LOAD]](s32)
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; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $sgpr0
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%1:_(p1) = G_CONSTANT i64 0
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%3:_(s32) = G_CONSTANT i32 3
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%0:_(<4 x s32>) = G_LOAD %1 :: (load (<4 x s32>) from `ptr addrspace(1) null`, addrspace 1)
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%2:_(s32) = G_EXTRACT_VECTOR_ELT %0, %3
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$sgpr0 = COPY %2
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SI_RETURN_TO_EPILOG implicit $sgpr0
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...
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# Tries to emit a foldable G_PTR_ADD with (p1, s128) operands.
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---
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name: test_ptradd_crash__offset_wider
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tracksRegLiveness: true
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body: |
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bb.0:
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; CHECK-LABEL: name: test_ptradd_crash__offset_wider
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; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 12
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; CHECK-NEXT: [[INTTOPTR:%[0-9]+]]:_(p1) = G_INTTOPTR [[C]](s64)
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; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[INTTOPTR]](p1) :: (load (s32), addrspace 1)
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; CHECK-NEXT: $sgpr0 = COPY [[LOAD]](s32)
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; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $sgpr0
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%1:_(p1) = G_CONSTANT i64 0
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%3:_(s32) = G_CONSTANT i32 3
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%0:_(<4 x s32>) = G_LOAD %1 :: (load (<4 x s32>) from `ptr addrspace(1) null`, addrspace 1)
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%2:_(s32) = G_EXTRACT_VECTOR_ELT %0, %3
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$sgpr0 = COPY %2
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SI_RETURN_TO_EPILOG implicit $sgpr0
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...
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