9e9907f1cf
Similar to 806761a7629df268c8aed49657aeccffa6bca449. For IR files without a target triple, -mtriple= specifies the full target triple while -march= merely sets the architecture part of the default target triple, leaving a target triple which may not make sense, e.g. amdgpu-apple-darwin. Therefore, -march= is error-prone and not recommended for tests without a target triple. The issue has been benign as we recognize $unknown-apple-darwin as ELF instead of rejecting it outrightly. This patch changes AMDGPU tests to not rely on the default OS/environment components. Tests that need fixes are not changed: ``` LLVM :: CodeGen/AMDGPU/fabs.f64.ll LLVM :: CodeGen/AMDGPU/fabs.ll LLVM :: CodeGen/AMDGPU/floor.ll LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll LLVM :: CodeGen/AMDGPU/fneg-fabs.ll LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll LLVM :: CodeGen/AMDGPU/schedule-if-2.ll ```
72 lines
2.6 KiB
YAML
72 lines
2.6 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
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# RUN: llc -mtriple=amdgcn -mcpu=gfx1030 -run-pass=instruction-select -o - %s | FileCheck -check-prefix=GFX10-WAVE32 %s
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# RUN: llc -mtriple=amdgcn -mcpu=gfx1030 -mattr=+wavefrontsize64 -run-pass=instruction-select -o - %s | FileCheck -check-prefix=GFX10-WAVE64 %s
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---
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name: stackrestore_waveaddress_sgpr
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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; GFX10-WAVE32-LABEL: name: stackrestore_waveaddress_sgpr
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; GFX10-WAVE32: $sgpr32 = COPY $sgpr32
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;
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; GFX10-WAVE64-LABEL: name: stackrestore_waveaddress_sgpr
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; GFX10-WAVE64: $sgpr32 = COPY $sgpr32
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%0:sgpr(p5) = G_AMDGPU_WAVE_ADDRESS $sgpr32
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G_STACKRESTORE %0
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...
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# Test we aren't special casing the direct register value.
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---
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name: stackrestore_direct_sp_sgpr
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr10
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; GFX10-WAVE32-LABEL: name: stackrestore_direct_sp_sgpr
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; GFX10-WAVE32: liveins: $sgpr10
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; GFX10-WAVE32-NEXT: {{ $}}
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; GFX10-WAVE32-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr32
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; GFX10-WAVE32-NEXT: [[S_LSHR_B32_:%[0-9]+]]:sreg_32 = S_LSHR_B32 [[COPY]], 5, implicit-def dead $scc
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; GFX10-WAVE32-NEXT: $sgpr32 = COPY [[S_LSHR_B32_]]
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;
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; GFX10-WAVE64-LABEL: name: stackrestore_direct_sp_sgpr
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; GFX10-WAVE64: liveins: $sgpr10
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; GFX10-WAVE64-NEXT: {{ $}}
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; GFX10-WAVE64-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr32
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; GFX10-WAVE64-NEXT: [[S_LSHR_B32_:%[0-9]+]]:sreg_32 = S_LSHR_B32 [[COPY]], 6, implicit-def dead $scc
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; GFX10-WAVE64-NEXT: $sgpr32 = COPY [[S_LSHR_B32_]]
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%0:sgpr(p5) = COPY $sgpr32
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G_STACKRESTORE %0
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...
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---
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name: stackrestore_any_sgpr
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr10
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; GFX10-WAVE32-LABEL: name: stackrestore_any_sgpr
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; GFX10-WAVE32: liveins: $sgpr10
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; GFX10-WAVE32-NEXT: {{ $}}
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; GFX10-WAVE32-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr10
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; GFX10-WAVE32-NEXT: [[S_LSHR_B32_:%[0-9]+]]:sreg_32 = S_LSHR_B32 [[COPY]], 5, implicit-def dead $scc
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; GFX10-WAVE32-NEXT: $sgpr32 = COPY [[S_LSHR_B32_]]
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;
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; GFX10-WAVE64-LABEL: name: stackrestore_any_sgpr
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; GFX10-WAVE64: liveins: $sgpr10
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; GFX10-WAVE64-NEXT: {{ $}}
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; GFX10-WAVE64-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr10
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; GFX10-WAVE64-NEXT: [[S_LSHR_B32_:%[0-9]+]]:sreg_32 = S_LSHR_B32 [[COPY]], 6, implicit-def dead $scc
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; GFX10-WAVE64-NEXT: $sgpr32 = COPY [[S_LSHR_B32_]]
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%0:sgpr(p5) = COPY $sgpr10
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G_STACKRESTORE %0
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...
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