Matt Arsenault e94ee833f9 AMDGPU: Handle some vector operations in isCanonicalized ...

llvm-svn: 339077

2018-08-06 22:45:51 +00:00

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AArch64

[AArch64] Fix assertion failure on widened f16 BUILD_VECTOR

2018-08-06 14:14:41 +00:00

AMDGPU

AMDGPU: Handle some vector operations in isCanonicalized

2018-08-06 22:45:51 +00:00

ARC

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ARM

[ARM] FP16: support vector zip and unzip

2018-08-03 09:24:29 +00:00

AVR

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BPF

bpf: add missing RegState to notify MachineInstr verifier necessary register usage

2018-07-27 16:58:52 +00:00

Generic

Implement strip.invariant.group

2018-07-02 04:49:30 +00:00

Hexagon

[Hexagon] Simplify CFG after atomic expansion

2018-08-02 22:17:53 +00:00

Inputs

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Lanai

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Mips

[MIPS GlobalISel] Select global address

2018-08-01 09:03:23 +00:00

MIR

[DebugInfo][X86] Add start-after flags to MIR tests

2018-07-12 14:36:48 +00:00

MSP430

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Nios2

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NVPTX

[NVPTX] Handle __nvvm_reflect("__CUDA_ARCH").

2018-08-03 18:05:24 +00:00

PowerPC

[PowerPC] Do not round values prior to converting to integer

2018-08-02 00:03:22 +00:00

RISCV

[RISCV] Fixed test case failure due to r338047

2018-07-31 00:36:28 +00:00

SPARC

Regenerate remainder test.

2018-07-20 13:14:29 +00:00

SystemZ

[SystemZ] Improve handling of instructions which expand to several groups

2018-08-03 10:43:05 +00:00

Thumb

[ARM] Prefer lsls+lsrs over lsls+ands or lsrs+ands in Thumb1.

2018-07-25 18:22:22 +00:00

Thumb2

[ARM] Treat cmn immediates as legal in isLegalICmpImmediate.

2018-07-10 23:44:37 +00:00

WebAssembly

[WebAssembly] Cleanup of the way globals and global flags are handled

2018-08-03 14:33:37 +00:00

WinCFGuard

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WinEH

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X86

[X86] Fix assertion in subreg extraction

2018-08-06 21:16:16 +00:00

XCore

[DAGCombiner] extend(ifpositive(X)) -> shift-right (not X)

2018-07-15 16:27:07 +00:00