85a9f2e148
In PowerPC, the AtomicCmpXchgInst is lowered to ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS. However, this node does not handle the weak attribute of AtomicCmpXchgInst. As a result, when compiling C++ atomic_compare_exchange_weak_explicit, the generated assembly includes a "reservation lost" loop — i.e., it branches back and retries if the stwcx. (store-conditional) fails. This differs from GCC’s codegen, which does not include that loop for weak compare-exchange. Since PowerPC uses LL/SC-style atomic instructions, the patch enables AtomicExpandImpl::expandAtomicCmpXchg for PowerPC. With this, the weak attribute is properly respected, and the "reservation lost" loop is removed for weak operations. --------- Co-authored-by: Matt Arsenault <arsenm2@gmail.com>
25 lines
971 B
LLVM
25 lines
971 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=powerpc64le-linux-gnu < %s | FileCheck %s -check-prefix=PPC64LE
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define void @test(ptr %ptr, i8 %cmp, i8 %val) {
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; PPC64LE-LABEL: test:
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; PPC64LE: # %bb.0:
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; PPC64LE-NEXT: clrlwi 5, 5, 24
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; PPC64LE-NEXT: clrlwi 4, 4, 24
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; PPC64LE-NEXT: .p2align 5
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; PPC64LE-NEXT: .LBB0_1: # %cmpxchg.start
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; PPC64LE-NEXT: # =>This Inner Loop Header: Depth=1
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; PPC64LE-NEXT: lbarx 6, 0, 3
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; PPC64LE-NEXT: clrlwi 6, 6, 24
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; PPC64LE-NEXT: cmplw 6, 4
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; PPC64LE-NEXT: bnelr 0
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; PPC64LE-NEXT: # %bb.2:
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; PPC64LE-NEXT: # in Loop: Header=BB0_1 Depth=1
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; PPC64LE-NEXT: stbcx. 5, 0, 3
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; PPC64LE-NEXT: bne 0, .LBB0_1
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; PPC64LE-NEXT: # %bb.3:
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; PPC64LE-NEXT: blr
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%res = cmpxchg ptr %ptr, i8 %cmp, i8 %val monotonic monotonic
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ret void
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}
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