9e9907f1cf
Similar to 806761a7629df268c8aed49657aeccffa6bca449. For IR files without a target triple, -mtriple= specifies the full target triple while -march= merely sets the architecture part of the default target triple, leaving a target triple which may not make sense, e.g. amdgpu-apple-darwin. Therefore, -march= is error-prone and not recommended for tests without a target triple. The issue has been benign as we recognize $unknown-apple-darwin as ELF instead of rejecting it outrightly. This patch changes AMDGPU tests to not rely on the default OS/environment components. Tests that need fixes are not changed: ``` LLVM :: CodeGen/AMDGPU/fabs.f64.ll LLVM :: CodeGen/AMDGPU/fabs.ll LLVM :: CodeGen/AMDGPU/floor.ll LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll LLVM :: CodeGen/AMDGPU/fneg-fabs.ll LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll LLVM :: CodeGen/AMDGPU/schedule-if-2.ll ```
30 lines
1.2 KiB
LLVM
30 lines
1.2 KiB
LLVM
; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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declare i32 @llvm.amdgcn.sffbh.i32(i32) #1
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; GCN-LABEL: {{^}}s_flbit:
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; GCN: s_load_dword [[VAL:s[0-9]+]],
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; GCN: s_flbit_i32 [[SRESULT:s[0-9]+]], [[VAL]]
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; GCN: v_mov_b32_e32 [[VRESULT:v[0-9]+]], [[SRESULT]]
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; GCN: buffer_store_dword [[VRESULT]],
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define amdgpu_kernel void @s_flbit(ptr addrspace(1) noalias %out, i32 %val) #0 {
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%r = call i32 @llvm.amdgcn.sffbh.i32(i32 %val)
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store i32 %r, ptr addrspace(1) %out, align 4
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ret void
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}
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; GCN-LABEL: {{^}}v_flbit:
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; GCN: buffer_load_dword [[VAL:v[0-9]+]],
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; GCN: v_ffbh_i32_e32 [[RESULT:v[0-9]+]], [[VAL]]
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; GCN: buffer_store_dword [[RESULT]],
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define amdgpu_kernel void @v_flbit(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %valptr) #0 {
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%val = load i32, ptr addrspace(1) %valptr, align 4
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%r = call i32 @llvm.amdgcn.sffbh.i32(i32 %val)
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store i32 %r, ptr addrspace(1) %out, align 4
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ret void
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}
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attributes #0 = { nounwind }
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attributes #1 = { nounwind readnone }
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