9e9907f1cf
Similar to 806761a7629df268c8aed49657aeccffa6bca449. For IR files without a target triple, -mtriple= specifies the full target triple while -march= merely sets the architecture part of the default target triple, leaving a target triple which may not make sense, e.g. amdgpu-apple-darwin. Therefore, -march= is error-prone and not recommended for tests without a target triple. The issue has been benign as we recognize $unknown-apple-darwin as ELF instead of rejecting it outrightly. This patch changes AMDGPU tests to not rely on the default OS/environment components. Tests that need fixes are not changed: ``` LLVM :: CodeGen/AMDGPU/fabs.f64.ll LLVM :: CodeGen/AMDGPU/fabs.ll LLVM :: CodeGen/AMDGPU/floor.ll LLVM :: CodeGen/AMDGPU/fneg-fabs.f64.ll LLVM :: CodeGen/AMDGPU/fneg-fabs.ll LLVM :: CodeGen/AMDGPU/r600-infinite-loop-bug-while-reorganizing-vector.ll LLVM :: CodeGen/AMDGPU/schedule-if-2.ll ```
167 lines
4.9 KiB
YAML
167 lines
4.9 KiB
YAML
# RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -verify-machineinstrs -run-pass post-RA-hazard-rec -o - %s | FileCheck -check-prefixes=GCN,GFX10 %s
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# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -verify-machineinstrs -run-pass post-RA-hazard-rec -o - %s | FileCheck -check-prefix=GCN %s
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# GCN-LABEL: name: hazard_vcmpx_smov_exec_lo
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# GCN: $sgpr0 = S_MOV_B32 $exec_lo
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# GFX10-NEXT: S_WAITCNT_DEPCTR 65534
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# GCN-NEXT: V_CMPX_LE_F32_nosdst_e32
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---
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name: hazard_vcmpx_smov_exec_lo
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body: |
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bb.0:
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successors: %bb.1
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$vgpr0 = V_MOV_B32_e32 0, implicit $exec
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$sgpr0 = S_MOV_B32 $exec_lo
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V_CMPX_LE_F32_nosdst_e32 0, $vgpr0, implicit-def $exec, implicit $mode, implicit $exec
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S_BRANCH %bb.1
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bb.1:
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S_ENDPGM 0
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...
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# GCN-LABEL: name: hazard_vcmpx_smov_exec
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# GCN: $sgpr0_sgpr1 = S_MOV_B64 $exec
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# GFX10-NEXT: S_WAITCNT_DEPCTR 65534
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# GCN-NEXT: V_CMPX_LE_F32_nosdst_e32
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---
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name: hazard_vcmpx_smov_exec
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body: |
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bb.0:
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successors: %bb.1
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$vgpr0 = V_MOV_B32_e32 0, implicit $exec
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$sgpr0_sgpr1 = S_MOV_B64 $exec
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V_CMPX_LE_F32_nosdst_e32 0, $vgpr0, implicit-def $exec, implicit $mode, implicit $exec
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S_BRANCH %bb.1
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bb.1:
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S_ENDPGM 0
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...
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# GCN-LABEL: name: no_hazard_vcmpx_vmov_exec_lo
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# GCN: $vgpr0 = V_MOV_B32_e32 $exec_lo, implicit $exec
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# GCN-NEXT: V_CMPX_LE_F32_nosdst_e32
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---
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name: no_hazard_vcmpx_vmov_exec_lo
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body: |
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bb.0:
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successors: %bb.1
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$vgpr0 = V_MOV_B32_e32 $exec_lo, implicit $exec
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V_CMPX_LE_F32_nosdst_e32 0, $vgpr0, implicit-def $exec, implicit $mode, implicit $exec
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S_BRANCH %bb.1
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bb.1:
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S_ENDPGM 0
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...
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# GCN-LABEL: name: no_hazard_vcmpx_valu_impuse_exec
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# GCN: $vgpr0 = V_MOV_B32_e32 0, implicit $exec
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# GCN-NEXT: V_CMPX_LE_F32_nosdst_e32
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---
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name: no_hazard_vcmpx_valu_impuse_exec
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body: |
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bb.0:
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successors: %bb.1
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$vgpr0 = V_MOV_B32_e32 0, implicit $exec
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V_CMPX_LE_F32_nosdst_e32 0, $vgpr0, implicit-def $exec, implicit $mode, implicit $exec
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S_BRANCH %bb.1
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bb.1:
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S_ENDPGM 0
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...
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# GCN-LABEL: name: no_hazard_vcmpx_smov_exec_lo_valu_writes_sgpr_imp
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# GCN: $sgpr0 = S_MOV_B32 $exec_lo
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# GCN-NEXT: $vgpr0 = V_ADDC_U32_e32 0, $vgpr0, implicit-def $vcc, implicit $vcc, implicit $exec
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# GCN-NEXT: V_CMPX_LE_F32_nosdst_e32
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---
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name: no_hazard_vcmpx_smov_exec_lo_valu_writes_sgpr_imp
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body: |
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bb.0:
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successors: %bb.1
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$vgpr0 = V_MOV_B32_e32 0, implicit $exec
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$sgpr0 = S_MOV_B32 $exec_lo
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$vgpr0 = V_ADDC_U32_e32 0, $vgpr0, implicit-def $vcc, implicit $vcc, implicit $exec
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V_CMPX_LE_F32_nosdst_e32 0, $vgpr0, implicit-def $exec, implicit $mode, implicit $exec
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S_BRANCH %bb.1
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bb.1:
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S_ENDPGM 0
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...
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# GCN-LABEL: name: no_hazard_vcmpx_smov_exec_lo_valu_writes_sgpr_exp
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# GCN: $sgpr0 = S_MOV_B32 $exec_lo
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# GCN-NEXT: $sgpr0_sgpr1 = V_CMP_EQ_U32_e64 $vgpr0, 0, implicit $exec
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# GCN-NEXT: V_CMPX_LE_F32_nosdst_e32
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---
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name: no_hazard_vcmpx_smov_exec_lo_valu_writes_sgpr_exp
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body: |
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bb.0:
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successors: %bb.1
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$vgpr0 = V_MOV_B32_e32 0, implicit $exec
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$sgpr0 = S_MOV_B32 $exec_lo
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$sgpr0_sgpr1 = V_CMP_EQ_U32_e64 $vgpr0, 0, implicit $exec
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V_CMPX_LE_F32_nosdst_e32 0, $vgpr0, implicit-def $exec, implicit $mode, implicit $exec
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S_BRANCH %bb.1
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bb.1:
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S_ENDPGM 0
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...
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# GCN-LABEL: name: no_hazard_vcmpx_smov_exec_lo_depctr_fffe
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# GCN: $sgpr0 = S_MOV_B32 $exec_lo
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# GCN-NEXT: S_WAITCNT_DEPCTR 65534
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# GCN-NEXT: V_CMPX_LE_F32_nosdst_e32
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---
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name: no_hazard_vcmpx_smov_exec_lo_depctr_fffe
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body: |
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bb.0:
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successors: %bb.1
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$vgpr0 = V_MOV_B32_e32 0, implicit $exec
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$sgpr0 = S_MOV_B32 $exec_lo
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S_WAITCNT_DEPCTR 65534
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V_CMPX_LE_F32_nosdst_e32 0, $vgpr0, implicit-def $exec, implicit $mode, implicit $exec
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S_BRANCH %bb.1
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bb.1:
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S_ENDPGM 0
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...
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# GCN-LABEL: name: hazard_vcmpx_smov_exec_lo_depctr_ffff
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# GCN: $sgpr0 = S_MOV_B32 $exec_lo
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# GCN-NEXT: S_WAITCNT_DEPCTR 65535
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# GFX10-NEXT: S_WAITCNT_DEPCTR 65534
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# GCN-NEXT: V_CMPX_LE_F32_nosdst_e32
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---
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name: hazard_vcmpx_smov_exec_lo_depctr_ffff
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body: |
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bb.0:
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successors: %bb.1
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$vgpr0 = V_MOV_B32_e32 0, implicit $exec
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$sgpr0 = S_MOV_B32 $exec_lo
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S_WAITCNT_DEPCTR 65535
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V_CMPX_LE_F32_nosdst_e32 0, $vgpr0, implicit-def $exec, implicit $mode, implicit $exec
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S_BRANCH %bb.1
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bb.1:
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S_ENDPGM 0
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...
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# GCN-LABEL: name: hazard_vcmpx_smov_exec_lo_depctr_effe
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# GCN: $sgpr0 = S_MOV_B32 $exec_lo
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# GCN-NEXT: S_WAITCNT_DEPCTR 61438
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# GCN-NEXT: V_CMPX_LE_F32_nosdst_e32
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---
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name: hazard_vcmpx_smov_exec_lo_depctr_effe
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body: |
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bb.0:
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successors: %bb.1
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$vgpr0 = V_MOV_B32_e32 0, implicit $exec
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$sgpr0 = S_MOV_B32 $exec_lo
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S_WAITCNT_DEPCTR 61438
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V_CMPX_LE_F32_nosdst_e32 0, $vgpr0, implicit-def $exec, implicit $mode, implicit $exec
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S_BRANCH %bb.1
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bb.1:
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S_ENDPGM 0
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...
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