Matt Arsenault 9bd10853e5

AMDGPU: Undo atomicrmw add/sub/xor 0 -> atomicrmw or canonicalization (#87533) ...

InstCombine transforms add of 0 to or of 0. For system atomics, this is
problematic because while PCIe supports add, it does not support the
other operations. Undo this for system scope atomics.

2024-04-13 00:24:12 +02:00

..

AArch64

[CodeGen] Port AtomicExpand to new Pass Manager (#71220)

2024-02-25 18:42:22 +05:30

AMDGPU

AMDGPU: Undo atomicrmw add/sub/xor 0 -> atomicrmw or canonicalization (#87533)

2024-04-13 00:24:12 +02:00

ARM

[CodeGen] Port AtomicExpand to new Pass Manager (#71220)

2024-02-25 18:42:22 +05:30

Hexagon

[CodeGen] Port AtomicExpand to new Pass Manager (#71220)

2024-02-25 18:42:22 +05:30

LoongArch

[CodeGen] Port AtomicExpand to new Pass Manager (#71220)

2024-02-25 18:42:22 +05:30

Mips

[CodeGen] Port AtomicExpand to new Pass Manager (#71220)

2024-02-25 18:42:22 +05:30

PowerPC

[CodeGen] Port AtomicExpand to new Pass Manager (#71220)

2024-02-25 18:42:22 +05:30

RISCV

[CodeGen] Port AtomicExpand to new Pass Manager (#71220)

2024-02-25 18:42:22 +05:30

SPARC

[CodeGen] Port AtomicExpand to new Pass Manager (#71220)

2024-02-25 18:42:22 +05:30

X86

[CodeGen] Port AtomicExpand to new Pass Manager (#71220)

2024-02-25 18:42:22 +05:30