b67796f3fc
This is first patch for Zvfbfa codegen and I'm going to break it down to several patches to make it easier to reivew. The codegen supports both scalable vector and fixed length vector on both native operations and vp intrinsics.
57 lines
2.1 KiB
LLVM
57 lines
2.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv32 -mattr=+v,+experimental-zvfbfa \
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; RUN: -target-abi=ilp32d -verify-machineinstrs < %s | FileCheck %s
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; RUN: llc -mtriple=riscv64 -mattr=+v,+experimental-zvfbfa \
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; RUN: -target-abi=lp64d -verify-machineinstrs < %s | FileCheck %s
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define <2 x bfloat> @copysign_v2bf16(<2 x bfloat> %vm, <2 x bfloat> %vs) {
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; CHECK-LABEL: copysign_v2bf16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 2, e16alt, mf4, ta, ma
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; CHECK-NEXT: vfsgnj.vv v8, v8, v9
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; CHECK-NEXT: ret
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%r = call <2 x bfloat> @llvm.copysign.v2bf16(<2 x bfloat> %vm, <2 x bfloat> %vs)
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ret <2 x bfloat> %r
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}
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define <4 x bfloat> @copysign_v4bf16(<4 x bfloat> %vm, <4 x bfloat> %vs) {
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; CHECK-LABEL: copysign_v4bf16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 4, e16alt, mf2, ta, ma
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; CHECK-NEXT: vfsgnj.vv v8, v8, v9
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; CHECK-NEXT: ret
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%r = call <4 x bfloat> @llvm.copysign.v4bf16(<4 x bfloat> %vm, <4 x bfloat> %vs)
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ret <4 x bfloat> %r
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}
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define <8 x bfloat> @copysign_v8bf16(<8 x bfloat> %vm, <8 x bfloat> %vs) {
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; CHECK-LABEL: copysign_v8bf16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 8, e16alt, m1, ta, ma
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; CHECK-NEXT: vfsgnj.vv v8, v8, v9
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; CHECK-NEXT: ret
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%r = call <8 x bfloat> @llvm.copysign.v8bf16(<8 x bfloat> %vm, <8 x bfloat> %vs)
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ret <8 x bfloat> %r
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}
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define <16 x bfloat> @copysign_v16bf16(<16 x bfloat> %vm, <16 x bfloat> %vs) {
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; CHECK-LABEL: copysign_v16bf16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 16, e16alt, m2, ta, ma
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; CHECK-NEXT: vfsgnj.vv v8, v8, v10
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; CHECK-NEXT: ret
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%r = call <16 x bfloat> @llvm.copysign.v16bf16(<16 x bfloat> %vm, <16 x bfloat> %vs)
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ret <16 x bfloat> %r
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}
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define <32 x bfloat> @copysign_v32bf32(<32 x bfloat> %vm, <32 x bfloat> %vs) {
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; CHECK-LABEL: copysign_v32bf32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: li a0, 32
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; CHECK-NEXT: vsetvli zero, a0, e16alt, m4, ta, ma
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; CHECK-NEXT: vfsgnj.vv v8, v8, v12
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; CHECK-NEXT: ret
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%r = call <32 x bfloat> @llvm.copysign.v32bf32(<32 x bfloat> %vm, <32 x bfloat> %vs)
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ret <32 x bfloat> %r
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}
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