Craig Topper 05d04f0a05

[RISCV] Make RISCVISAInfo::updateMaxELen extension checking more robust. Add inference from V extension. (#90650) ...

We weren't fully checking that we parsed Zve*x/f/d correctly. This could
break if new extension is added that starts with Zve.

We were assuming the Zve64d is present whenever V is so we only
inferred from Zve*. It's more correct to infer ELEN from V itself too.

2024-04-30 13:49:05 -07:00

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Unix

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Windows

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AArch64TargetParser.cpp

[AArch64] Remove Automatic Enablement of FEAT_F32MM (#85203)

2024-03-27 07:49:38 +00:00

ARMTargetParser.cpp

Revert "[ARM] __ARM_ARCH macro definition fix (#81493)"

2024-02-19 12:19:16 +00:00

ARMTargetParserCommon.cpp

[AArch64] Add missing field 'GuardedControlStack' initializer (NFC)

2024-01-11 21:35:04 +08:00

CMakeLists.txt

[ARM][AArch64] autogenerate header file for TargetParser from Target tablegen files (#88378)

2024-04-24 09:18:36 +01:00

CSKYTargetParser.cpp

[llvm] Use StringRef::{starts,ends}_with (NFC) (#74956)

2023-12-11 21:01:36 -08:00

Host.cpp

[AArch64] Add support for Cortex-R82AE and improve Cortex-R82 (#90440)

2024-04-30 14:15:01 +01:00

LoongArchTargetParser.cpp

[LoongArch] Support -march=native and -mtune=

2023-08-09 10:29:50 +08:00

RISCVISAInfo.cpp

[RISCV] Make RISCVISAInfo::updateMaxELen extension checking more robust. Add inference from V extension. (#90650)

2024-04-30 13:49:05 -07:00

RISCVTargetParser.cpp

[RISCV] Split code that tablegen needs out of RISCVISAInfo. (#89684)

2024-04-23 15:12:36 -07:00

SubtargetFeature.cpp

Remove a reference to rdar://5972456

2023-08-09 18:11:28 -07:00

TargetParser.cpp

AMDGPU: Define a feature for v_dot4_f32_* instructions (#84248)

2024-03-06 14:37:03 -08:00

Triple.cpp

[SPIR-V] Emit SPIR-V generator magic number and version (#87951)

2024-04-22 10:47:46 -07:00

X86TargetParser.cpp

[X86] Support more ISAs to enable __builtin_cpu_supports (#79086)

2024-02-04 21:21:12 +08:00